STM32L011X3 datasheet(75/115 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32L011x3/4

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DocID027973 Rev 4

6.3.13

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 50 are derived from tests

performed under the conditions summarized in Table 18. All I/Os are CMOS and TTL

compliant.

Table 50. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

TC, FT, FTf, RST

I/Os

0.3VDD

BOOT0 pin

0.14VDD(1)

VIH

Input high level voltage

All I/Os except

BOOT0 pin

0.7 VDD

BOOT0 pin

0.15

VDD+0.56(1)

Vhys

I/O Schmitt trigger voltage hysteresis

(2)

Standard I/Os

10% VDD(3)

BOOT0 pin

0.01

Ilkg

Input leakage current (4)

VSS ≤ VIN ≤ VDD

All I/Os except

BOOT0 and FTf

I/Os

±50

BOOT0(5)

VIN = VDD

-+2

µA

BOOT0

VIN = VSS

-0

VDD ≤ VIN ≤ 5V

FT I/Os

200

VDD ≤ VIN ≤ 5V

FTf I/Os

500

VDD ≤ VIN ≤ 5V

BOOT0

µA

RPU

Weak pull-up equivalent resistor(6)

VIN = VSS

RPD

Weak pull-down equivalent resistor(6)

VIN = VDD

CIO

I/O pin capacitance

1. Guaranteed by characterization, not tested in production

2. Hysteresis voltage between Schmitt trigger switching levels. Guaranteed by characterization results, not tested in production.

3. With a minimum of 200 mV. Guaranteed by characterization results, not tested in production.

4. The max. value may be exceeded if negative current is injected on adjacent pins.

5. BOOT0/PB9 pin limitation: typical input leakage current = 2 µA and input frequency limited to 10 kHz (1.65 V < VDD < 2.7 V)

and 5 MHz (2.7 V < VDD <3.6 V).

6. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

MOS/NMOS contribution to the series resistance is minimum (~10% order).

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