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STM8AF6213 Arkusz danych(PDF) 82 Page - STMicroelectronics |
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STM8AF6213 Arkusz danych(HTML) 82 Page - STMicroelectronics |
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82 / 106 page  Electrical characteristics STM8AF6213/23/23A/26 82/106 DocID025118 Rev 5 Figure 36. SPI timing diagram - slave mode and CPHA = 0 1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD. th(SO)(2) Data output hold time Slave mode (after enable edge) 27 - ns th(MO)(2) Master mode (after enable edge) 11 - 1. Parameters are given by selecting 10 MHz I/O output frequency. 2. Values based on design simulation and/or characterization results, and not tested in production. 3. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data. 4. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z. Table 52. SPI characteristics (continued) Symbol Parameter Conditions(1) Min Max Unit |
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