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BL24C64A Arkusz danych(PDF) 1 Page - SHANGHAI BELLING CO., LTD. |
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BL24C64A Arkusz danych(HTML) 1 Page - SHANGHAI BELLING CO., LTD. |
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1 / 17 page ![]() BL24C64A 64Kbits (8,192×8) BL24C64A 64Kbits (8,192×8) Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2016 Belling All Rights Reserved www.belling.com.cn 1-17 Features Compatible with all I2C bidirectional data transfer protocol Memory array: – 64 Kbits (8 Kbytes) of EEPROM – Page size: 32 bytes – Additional Write lockable page Single supply voltage and high speed: – 1 MHz Random and sequential Read modes Write: – Byte Write within 3 ms – Page Write within 3 ms – Partial Page Writes Allowed Write Protect Pin for Hardware Data Protection Schmitt Trigger, Filtered Inputs for Noise Suppression High-reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Enhanced ESD/Latch-up protection – HBM 8000V 8-lead PDIP/SOP/TSSOP/UDFN and WLCSP4 packages Description The BL24C64A provides 65536 bits of serial electrically erasable and programmable read- only memory (EEPROM), organized as 8192 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The BL24C64A offers an additional page, named the Identification Page (32 bytes). The Identification Page can be used to store sensitive application parameters which can be (later) permanently locked in Read-only mode. Pin Configuration A2 GND VCC WP A0 A1 A2 GND A0 A1 A2 GND A0 A1 A2 GND VCC WP VCC WP VCC WP 1 2 3 4 5 6 7 8 1 2 3 4 1 2 3 4 5 6 7 8 5 6 7 8 5 6 7 8 1 2 3 4 8-lead PDIP 8-lead SOP 8-lead TSSOP 8-pad DFN 1 2 A B Vcc Vss SCL SDA WLCSP4 Bottem view Marking side (top view) SCL SDA SCL SDA SCL SDA SCL SDA A0 A1 |
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