HMC1197LP7FE datasheet(43/57 Pages) AD

43 / 57 page

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Phone: 978-250-3343

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HMC1197LP7FE

v03.0314

Wideband direct Quadrature Modulator

w/ Fractional-n Pll & Vco, 100 - 4000 MHz

2.13

reg 0bh Pd/cP register deFault 78061 h

BIT

TYPE

NAME

Width

Default

DESCRIPTION

[3:0]

R/W

Reserved

[4]

R/W

PD Phase Select

Inverts the PD polarity (program to 0)

0- Use with a positive tuning slope VCO and Passive Loop Filter

(default when using internal VCO)

1- Use with a Negative Slope VCO or with an inverting Active Loop

Filter with a Positive Slope VCO (Only recommended when using an

External VCO, and an active loop filter)

[5]

R/W

PD Up Output Enable

Enables the PD UP output, see also

Reg 0Bh[9]

[6]

R/W

PD Down Output Enable

Enables the PD DN output, see also

Reg 0Bh[10]

[8:7]

R/W

Reserved

Reserved, Program to 0d.

[9]

R/W

Force CP UP

Forces CP UP output on if CP is not forced down - Use for Test only

[10]

R/W

Force CP DN

Forces CP DN output on if CP is not forced up - Use for Test only

[11]

R/W

Force CP Mid Rail

Force CP MId Rail - Use for Test only (if Force CP UP or Force CP

DN are enabled they have precedence)

[23:12]

R/W

Reserved

120d

78h

Reserved.

2.14

reg 0ch exact Frequency register

BIT

TYPE

NAME

Width

Default

DESCRIPTION

[23:0]

R/W

Number of Channels per Fpd

Comparison Frequency divided by the correction rate. Must be

an integer. Frequencies at exactly the correction rate will have

zero frequency error. Only works in modulator Mode B(3rd order

recommended modulator type in Reg06[3:2]). Reg 0Ch must be 0 if

using ohter DSM type

0: Disabled

1: Invalid

≥ 2 valid

max 224-1 = FFFFFFh = 16,777,215d

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