HMC1197LP7FE datasheet(19/57 Pages) AD

19 / 57 page

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HMC1197LP7FE

v03.0314

Wideband direct Quadrature Modulator

w/ Fractional-n Pll & Vco, 100 - 4000 MHz

be any rational number supported by the N divider.

N is set by the integer (Nint = Reg 03h) and fractional (Nfrac = Reg 04h) register contents

N = N

int + Nfrac / 2

(EQ 2)

The AutoCal state machine runs at the rate of the FSM clock, TFSM, where the FSM clock frequency cannot

be greater than 50 MHz.

FSM = Txtal · 2

(EQ 3)

is 0, 2, 4 or 5 as determined by Reg 0Ah[14:13]

The expected number of VCO counts, V, is given by

V = floor (N · 2

(EQ 4)

The nominal VCO frequency measured, fvcom, is given by

vcom = V · fxtal / (2

n · R)

(EQ 5)

where the worst case measurement error, ferr , is:

err ≈ ±fpd / 2

n + 1

(EQ 6)

Figure 37. VCO Calibration

A 5-bit step tuned VCO, for example, nominally requires 5 measurements for calibration, worst case 6

measurements, and hence 7 VSPI data transfers of 20 clock cycles each. Total calibration time, worst

case, is given by:

cal = k128TFSM + 6TPD 2

n + 7 · 20T

FSM

(EQ 7)

or equivalently

cal = Txtal (6R · 2

n + (140+(3 · 128)) · 2m)

(EQ 8)

For guaranteed hold of lock, across temperature extremes, the resolution should be better than

1/8th the frequency step caused by a VCO sub-band switch change. Better resolution settings will show

no improvement.

1.2.1.4.1.1

Vco autocal example

The HMC1197LP7FE must satisfy the maximum fpd limited by the two following conditions:

a. N ≥ 16 (fint), N ≥ 20.0 (ffrac), where N = fVCO/ fpd

b. fpd ≤ 100 MHz

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