Data Sheet

ADRF5130

Rev. A | Page 5 of 10

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

13

1

3

4

2

GND

GND

RF1

GND

5

6

GND

GND

GND

ADRF5130

TOP VIEW

(Not to Scale)

NOTES

1. EXPOSED PAD. EXPOSED PAD MUST BE

CONNECTED TO RF/DC GROUND.

PACKAGE

BASE

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 2, 4 to 9, 11 to 15, 17 to 20, 23, 24

GND

Ground. The package bottom has an exposed metal pad that must connect to the

printed circuit board (PCB) RF/dc ground. See Figure 3 for the GND interface schematic.

3

RF1

RF Output Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor

is required on this pin.

10

RFC

RF Input Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking

capacitor is required on this pin.

16

RF2

RF Output Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor

is required on this pin.

21

recommended digital input control voltage range in Table 1.

22

EPAD

Exposed Pad. Exposed pad must be connected to RF/dc ground.

Table 4. Truth Table

Signal Path State

RFC to RF1

RFC to RF2

Low

Off

On

High

On

Off

INTERFACE SCHEMATICS

GND

Figure 3. GND Interface Schematic

Figure 4. Control Interface Schematic