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LT4220IGN Arkusz danych(PDF) 4 Page - Linear Technology

Numer części LT4220IGN
Szczegółowy opis  Dual Supply Hot Swap Controller
PDF  16 Pages
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Producent  LINER [Linear Technology]
Strona internetowa  http://www.linear.com
Logo LINER - Linear Technology

LT4220IGN Arkusz danych(HTML) 4 Page - Linear Technology

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4
LT4220
4220f
The q denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VEE = –5V, unless otherwise noted.
AC ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
SUPPLY VOLTAGE (V)
0
2
3
20
4220 G01
1
0
5
10
15
4
FB+ VOLTAGE (V)
–1.5
50
40
30
20
10
0
–1.0
–0.5
0
0.5
4220 G02
1.0
1.5
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
FB– VOLTAGE (V)
60
50
40
30
20
10
0
4220 G03
TA = 25°C
ICC
IEE
VCC = 5V
VEE = –5V
ON+ = 2V
ON– = –2V
TA = 25°C
VCC = 5V
VEE = –5V
ON+ = 2V
ON– = –2V
TA = 25°C
Positive Circuit Breaker Sense
Voltage vs FB+ Voltage
Negative Circuit Breaker Sense
Voltage vs FB– Voltage
Supply Current vs Supply Voltage
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tPHLON+
ON+ Low to GATE+ Low
5k Pull-Up to GATE+, 1nF Load Capacitor
q
0.6
0.8
1.2
µs
tPLHON+
ON+ High to GATE+ High
5k Pull-Up to GATE+, 1nF Load Capacitor
q
0.6
1.5
3
µs
tPHLFB+
FB+ Low to PWRGD Low
5k Pull-Up to PWRGD
q
0.5
0.8
1.2
µs
tPLHFB+
FB+ High to PWRGD High
5k Pull-Up to PWRGD
q
0.6
1.25
3
µs
tPHLON–
ON– Low to GATE– Low
5k Pull-Up to GATE–, 1nF Load Capacitor
q
0.6
1
1.5
µs
tPLHON–
ON– High to GATE– High
5k Pull-Up to GATE–, 1nF Load Capacitor
q
1
2.1
3.5
µs
tPHLFB–
FB– Low to PWRGD Low
5k Pull-Up to PWRGD
q
0.6
1
1.5
µs
tPLHFB–
FB– High to PWRGD High
5k Pull-Up to PWRGD
q
0.8
1.25
2
µs
tSENSE+
SENSE+ to GATE+ Low
1nF On GATE+, 100mV Step, 5k Pull-Up
q
146
µs
tSENSE–
SENSE– to GATE– Low
1nF On GATE–, 100mV Step, 5k Pull-Up
q
146
µs
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages referenced to ground (GND) unless
specified.
Note 3: The absolute voltage difference between FB+ and FB– required to
force either the GATE+ or GATE– current to 0
µA.



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