AD9683 datasheet(39/45 Pages) AD

39 / 45 page

AD9683

Data Sheet

Rev. D | Page 38 of 44

Reg

Addr

(Hex)

Reg Addr

Name

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Default

Notes

0x65

JESD204B BID

config

JESD204B BID value

0x67

JESD204B LID

config

JESD204B LID value

0x6E

JESD204B

scrambler (SCR)

and lane (L)

configuration

JESD204B

scrambling

(SCR):

0 =

disabled,

1 =

enabled

JESD204B number of lanes (L); 0 = one lane per link (L = 1)

0x80

0x6F

JESD204B

parameter, F

JESD204B number of octets per frame (F); calculated value; read only

(Note that this value is in x − 1 format)

0x01

Read only

0x70

JESD204B

parameter, K

JESD204B number of frames per multiframe (K);

set value of K per JESD204B specifications, but must also be a multiple of four octets

(Note that this value is in x − 1 format)

0x1F

0x71

JESD204B

parameter, M

JESD204B number of converters (M); 0 = 1 converter

0x00

Read only

0x72

JESD204B

parameters,

N/CS

Number of control bits

(CS):

00 = no control bits

(CS = 0),

01 = 1 control bit

(CS = 1),

10 = 2 control bits

(CS = 2)

ADC converter resolution (N),

0xD = 14-bit converter (N = 14)

(Note that this value is in x − 1 format)

0x0D

0x73

JESD204B

parameters,

subclass/N’

JESD204B subclass:

00 = Subclass 0,

01 = Subclass 1 (default)

JESD204B N’ value; 0xF = N’ = 16

(Note that this value is in x − 1 format)

0x2F

0x74

JESD204B

parameter, S

Reserved;

set to 1

JESD204B samples per converter per frame cycle (S); read only

(Note that this value is in x − 1 format)

0x20

0x75

JESD204B

parameters, HD

and CF

JESD204B

HD value;

read only

JESD204B control words per frame clock cycle per link (CF); read only

(Note that this value is in x − 1 format)

0x00

Read only

0x76

JESD204B

RESV1

JESD204B Reserved Field 1

0x77

JESD204B

RESV2

JESD204B Reserved Field 2

0x79

JESD204B

CHKSUM

JESD204B checksum value for the output lane

0x80

JESD204B

output driver

control

JESD204B

driver

power-

down:

0 =

enabled,

1 =

powered

down

0x00

0x8B

JESD204B LMFC

offset

Local multiframe clock (LMFC) phase offset value; reset value for

LMFC phase counter when SYSREF± is asserted; used for

deterministic delay applications

0x00

0xA8

JESD204B

preemphasis

JESD204B preemphasis enable option (consult factory for more details);

set value to 0x04 for preemphasis off, and set value to 0x14 for preemphasis on

0x04

Typically not

required

0xFF

Device update

(global)

Transfer

settings

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