ADAV803ASTZ datasheet(18/61 Pages) AD

18 / 61 page

ADAV803

Rev. A | Page 17 of 60

Selecting a Sample Rate

The output sample rate of the ADC is always ADC MCLK/256,

as shown in Figure 23. By default, the ADC modulator runs at

ADC MCLK/2. When the ADC MCLK exceeds 12.288 MHz,

the ADC modulator should be set to run at ADC MCLK/4.

This is achieved by setting the AMC (ADC Modulator Clock)

bit in the ADC Control Register 1. To compensate for the

reduced modulator clock speed, a different set of filters is used

in the decimator section, ensuring that the sample rate remains

the same.

The AMC bit can also be used to boost the THD + N perform-

ance of the ADC at the expense of dynamic range. The

improvement is typically 0.5 dB to 1.0 dB and works because

selecting the lower modulator rate reduces the amount of digital

noise, improving THD + N, but also reduces the oversampling

ratio, therefore reducing the dynamic range by a corresponding

amount.

For best performance of the ADC, avoid using similar frequency

clocks from separate sources in the ADAV803. For example,

running the ADC from a 12.288 MHz clock connected to

MCLKI and using the PLL to generate a separate 12.288 MHz

clock for the DAC can reduce the performance of the ADC.

This is due to the interaction of the clocks, which generate beat

frequencies that can affect the charge on the switch capacitors of

the analog inputs.

WAIT FOR SAMPLE

DECREASE GAIN BY 0.5dB

AND WAIT ATTACK TIME

IS A RECOVERY

MODE ENABLED?

IS SAMPLE

GREATER THAN ATTACK

THRESHOLD?

IS SAMPLE

ABOVE ATTACK

THRESHOLD?

ARE ALL

SAMPLES BELOW

RECOVERY

THRESHOLD?

HAS GAIN BEEN

FULLY RESTORED?

YES

NORMAL RECOVERY

INCREASE GAIN BY 0.5dB

WAIT RECOVERY TIME

LIMITED RECOVERY

ATTACK MODE

IS SAMPLE

ABOVE ATTACK

THRESHOLD?

ARE ALL

SAMPLES BELOW

RECOVERY

THRESHOLD?

HAS GAIN BEEN

FULLY RESTORED?

IS GAINCNTR

AT MAXIMUM?

YES

INCREASE GAIN BY 0.5dB

INCREMENT

GAINCNTR

HAS RECOVERY

TIME BEEN

REACHED?

HAS RECOVERY

TIME BEEN

REACHED?

Figure 26. ALC Flow Diagram

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