ATECC508A datasheet(8/109 Pages) MICROCHIP

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Each ATECC508A ships with a guaranteed unique 72-bit serial number. Using the cryptographic

protocols supported by the device, a host system or remote server can verify a signature of the serial

number to prove that the serial number is authentic and not a copy. Serial numbers are often stored in a

standard Serial EEPROM; however, these can be easily copied with no way for the host to know if the

serial number is authentic or if it is a clone.

The ATECC508A can generate high-quality FIPS random numbers and employ them for any purpose,

including usage as part of the device’s crypto protocols. Because each random number is guaranteed to

be essentially unique from all numbers ever generated on this or any other device, their inclusion in the

protocol calculation ensures that replay attacks (i.e. re-transmitting a previously successful transaction)

will always fail(see Sections Random Number Generator (RNG) and Random Command).

System integration is easy due to a wide supply voltage range (of 2.0V to 5.5V) and an ultra-low sleep

current (of <150 nA). Complete DC parametrics are found in Section Electrical Characteristics. Multiple

package options are available (see Sections Product Identification System and Package Drawings).

See Section Compatibility for information regarding compatibility with the Microchip ATSHA204A and

ATECC108A devices.

1.3

Cryptographic Operation

The ATECC508A implements a complete asymmetric (public/private) key cryptographic signature solution

based upon Elliptic Curve Cryptography and the ECDSA signature protocol. The device features

hardware acceleration for the NIST standard P256 prime curve and supports the complete key life cycle

from high quality private key generation, to ECDSA signature generation, ECDH key agreement, and

ECDSA public key signature verification.

The hardware accelerator can implement such asymmetric cryptographic operations from ten to one-

thousand times faster than software running on standard microprocessors, without the usual high risk of

key exposure that is endemic to standard microprocessors.

The device is designed to securely store multiple private keys along with their associated public keys and

certificates. The signature verification command can use any stored or an external ECC public key. Public

keys stored within the device can be configured to require validation via a certificate chain to speed up

subsequent device authentications.

Random private key generation is supported internally within the device to ensure that the private key can

never be known outside of the device. The public key corresponding to a stored private key is always

returned when the key is generated and it may optionally be computed at a later time.

The ATECC508A also supports a standard hash-based challenge-response protocol in order to simplify

programming. In its most basic instantiation, the system sends a challenge to the device, which combines

that challenge with a secret key via the MAC, HMAC or SHA commands and then sends the response back

to the system. The device uses a SHA-256 cryptographic hash algorithm to make that combination so

that an observer on the bus cannot derive the value of the secret key, but preserving the ability of a

recipient to verify that the response is correct by performing the same calculation with a stored copy of

the secret on the recipient’s system.

Due to the flexible command set of the ATECC508A, these basic operation sets (i.e. ECDSA signatures,

ECDH key agreement and SHA-256 challenge-response) can be expanded in many ways. Using the

GenDig command(see Section GenDig Command), the values in other slots can be included in the

response digest or signature, which provides an effective way of proving that a data read really did come

from the device, as opposed to being inserted by a man-in-the-middle attacker. This same command can

ATECC508A

Introduction

Datasheet Complete

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