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LTM4642 Arkusz danych(PDF) 8 Page - Linear Technology

Numer części LTM4642
Szczegółowy opis  20VIN, Dual 4A or Single 8A DC/DC 關Module Regulator
PDF  32 Pages
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Producent  LINER [Linear Technology]
Strona internetowa  http://www.linear.com
Logo LINER - Linear Technology

LTM4642 Arkusz danych(HTML) 8 Page - Linear Technology

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LTM4642
8
4642fb
For more information www.linear.com/LTM4642
pin FuncTions
GND (A4-A7, C2, D1, D5, E1, E5, E7, F7, H4-H7): Power
ground pins for both input and output returns.
PHASMD (B4): Phase Mode Selection Pin for Program-
ming Clock Out Phase. See Electrical Characteristics and
Applications Information sections.
MODE/PLLIN(C3):ModeSelectionorExternalSynchroni-
zation Pin. Tying this pin to SGND enables discontinuous
mode. Tying this pin to INTVCC enables forced continuous
operation. A clock on the pin will force the controller into
the continuous mode of operation and synchronize the
internal oscillator. The suitable synchronizable frequency
range is 600kHz to 1400kHz subject to inductor ripple
current limits described in the FREQ/PLLFLTR pin section.
The external clock input high threshold is 2V, while the
input low threshold is 0.5V.
CPWR (C7): This pin is the main input power to the control
IC. This pin normally connects to the input source directly.
This pin can be biased at a voltage greater than 4.5V to
allow the VIN1andVIN2tooperatedownto2.375Vinputfor
applications that operate at 2.5V or 3.3V input. If the bias
is less than or equal to 5.3V, connect DRVCC to this pin.
SGND (D2, E2): Signal Ground Pins. Return ground path
for all analog and low power circuitry. Tie a single connec-
tion to PGND in the application. See the Recommended
Layout section.
CLKOUT (D4): Clock Out for Synchronizing Other Regula-
tors to the Common Clock. Used for multiphase applica-
tions. See Applications Information section.
EXTVCC (D6): External Power Input to Controller. When
EXTVCC is higher than 4.7V, the internal 5.3V regulator is
disabledandtheexternalsourcesuppliescurrenttoreduce
the power dissipation in the module. This will improve the
efficiency more at high input voltages.
INTVCC (D7): This pin powers the internal control circuits.
Tie this pin to DRVCCwitha2.2Ωresistor.Thispinrequires
a few milliamps.
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
COMP1, COMP2 (E3, D3): Current Control Threshold and
Error Amplifier Compensation Point. The module has been
internally compensated for all I/O ranges.
FREQ (E4): Frequency Selection Pin. Tie a resistor from
this pin to SGND to set the frequency of operation between
600kHz to 1.4MHz for the specific output voltages. For
3.3Vinputapplications,650kHzisanoptimizedfrequency.
For 5V to 20V input applications, the optimized operating
frequency for the output voltage is as follows: 0.8V to 1.2V
(650kHz), 1.5V to 1.8V (800kHz), 2.0V to 5V (1.2MHz), 5V
from 20V input (1.4MHz). The resistor equation:
RFREQ
( )=
41550
FREQ kHz
(
)
– 2.2
DRVCC (E6): This pin is the LDO 5.3V regulator output
used to power the internal control circuits and MOSFET
drivers.Thispinneedsa4.7µFceramicdecouplingcapaci-
tor to GND. For input voltages less than or equal to 5.3V,
connect this pin directly to the input voltage.
VOUTS1 (F2): Output Voltage Sense Point for Channel 1
Remote Sensing. This pin has a 49.9Ω resistor connected
to VOUT1. This pin can be connected at the load point for
accurate remote sensing.
VOUTS–(F3):RemoteGroundSensePin.Connectatremote
ground point.
VFB1, VFB2 (F4, C4): The negative input of the error
amplifier. Internally, this pin is connected to VOUT with
a 60.4k precision resistor. Different output voltages can
be programmed with an additional resistor between VFB
and SGND pins. See the Applications Information section
for details.
TRACK/SS1,TRACK/SS2(F5,C5):OutputVoltageTracking
and Soft-Start Pins. Internal soft-start currents of 1.0µA
charge the soft-start capacitors. See the Applications
Information section to use the tracking function.
PGOOD1, PGOOD2 (F6, C6): Output Voltage Power Good
Indicator. Open-drain logic output that is pulled to ground
when the output voltage is not within ±7.5% of the regula-
tion point. In single output parallel operation when VFB2 is
tied to INTVCC, the PGOOD2 pin is not to be used.



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