LTM4642 datasheet(24/32 Pages) LINER

24 / 32 page

LTM4642

4642fb

For more information www.linear.com/LTM4642

applicaTions inForMaTion

Figure 25. Recommended PCB Layout

Layout Checklist/Example

The high integration of LTM4642 makes the PCB board

layoutverysimpleandeasy.However,tooptimizeitselectri-

cal and thermal performance, some layout considerations

are still necessary.

• Use large PCB copper areas for high current path, in-

cluding VIN1, VIN2, PGND, VOUT1 and VOUT2. It helps to

minimize the PCB conduction loss and thermal stress.

• Place high frequency ceramic input and output capaci-

tors next to the VIN, PGND and VOUT pins to minimize

high frequency noise.

• Place a dedicated power ground layer underneath the

unit.

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnections

between top layer and other power layers.

• Do not put vias directly on the pads.

• Use a separated SGND ground copper area for com-

ponents connected to signal pins. Connect the SGND

to PGND underneath the unit.

• Decouple the input and output grounds to lower the

output ripple noise.

Figure 25givesagoodexampleoftherecommendedlayout.

CIN3

CIN4

CIN1

VIN1

VIN2

GND

4642 F25

GND

VOUT2

VOUT1

GND

COUT2

CINTVCC

CIN2

COUT2

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