CS42418 datasheet(22/67 Pages) CIRRUS

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CS42418

3.5.4

One Line Mode(OLM) Configurations

3.5.4.1

OLM Config #1

One Line Mode Configuration #1 can support up to 8 channels of DAC data, and 6 channels of ADC data.

This is the only configuration which will support up to 24-bit samples at a sampling frequency of 48 kHz

on all channels for both the DAC and ADC.

Description

Functional Mode Register (addr = 03h)

Set DAC_FMx = ADC_FMx = 00,01,10

DAC_LRCK must equal ADC_LRCK; sample rate conversion not supported

Set ADC_CLK_SEL = 0

Configure ADC_SDOUT to be clocked from the DAC_SP clocks.

Interface Format Register (addr = 04h)

Set DIFx bits to proper serial format

Select the digital interface format when not in one line mode

Set ADC_OLx bits = 00,01,10

Select ADC operating mode, see table below for valid combinations

Set DAC_OLx bits = 00,01,10

Select DAC operating mode, see table below for valid combinations

Misc. Control Register (addr = 05h)

Set DAC_SP M/S = 1

Configure DAC Serial Port to master mode.

Set ADC_SP M/S = 1

Configure ADC Serial Port to master mode.

Set EXT ADC SCLK = 0

Identify external ADC clock source as ADC Serial Port.

DAC Mode

Not One Line Mode

One Line Mode #1

One Line Mode #2

ADC Mode

Not One

Line Mode

DAC_SCLK=64Fs

DAC_LRCK=SSM/DSM/QSM

DAC_SCLK=128Fs

DAC_LRCK=SSM/DSM

ADC_SCLK=64Fs

ADC_LRCK=DAC_LRCK

not valid

One Line

Mode #1

DAC_SCLK=128Fs

DAC_LRCK=SSM/DSM

ADC_SCLK=64Fs

ADC_LRCK=DAC_LRCK

DAC_SCLK=128Fs

DAC_LRCK=SSM/DSM

ADC_SCLK=64Fs

ADC_LRCK=DAC_LRCK

not valid

One Line

Mode #2

DAC_SCLK=256Fs

DAC_LRCK=SSM

ADC_SCLK=64Fs

ADC_LRCK=DAC_LRCK

not valid

DAC_SCLK=256Fs

DAC_LRCK=SSM

ADC_SCLK=64Fs

ADC_LRCK=DAC_LRCK

SCLK _P ORT1

LRCK_POR T1

SD IN_POR T1

SCLK _P ORT2

LRCK_POR T2

SD OUT1_POR T2

SD OUT2_POR T2

SD OUT3_POR T2

SD OUT4_POR T2

ADC _SC LK

AD C_LRC K

DAC_SC LK

DA C_LRC K

ADC_S DOU T

DAC_SD IN1

DAC_SD IN2

DAC_SD IN3

DAC_SD IN4

RM CK

A DCIN1

A DCIN2

MC LK

SD OUT1

SD OUT2

LR CK

SCLK

64Fs

ADC Data

64Fs,128Fs, 256Fs

DIG ITA L A UD IO

PRO CESSO R

CS5361

C S5361

MC LK

Figure 13. OLM Configuration #1

CS42418

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