MPC852T datasheet(4/80 Pages) FREESCALE

4 / 80 page

MPC852T Hardware Specifications, Rev. 3.1

Freescale Semiconductor

Features

— Supports one independent PCMCIA socket; 8-memory or I/O windows supported

•

Debug interface

— Eight comparators: four operate on instruction address, two operate on data address, and two operate on

data

— Supports conditions: = < >

— Each watchpoint can generate a break point internally.

•

Normal high and normal low power modes to conserve power

•

1.8 V Core and 3.3 V I/O operation with 5-V TTL compatibility. Refer to Table5 for a listing of the 5-V

Tolerant pins.

Figure 1. MPC852T Block Diagram

Bus

System Interface Unit (SIU)

Embedded

Parallel I/O

Memory Controller

Timers

Interrupt

Controllers

8-Kbyte

Dual-Port RAM

1 Virtual

System Functions

4-Kbyte

Instruction Cache

32-Entry ITLB

Instruction MMU

4-Kbyte

Data Cache

32-Entry DTLB

Data MMU

Instruction

Bus

Load/Store

Bus

Unified

Internal

Bus Interface

Unit

External

Bus Interface

Unit

Timers

32-Bit RISC Controller

and Program

ROM

MPC8xx

Processor

Core

DMAs

FIFOs

10/100

MII

Base-T

Media Access

Serial Interface (NMSI)

Control

Fast Ethernet

Controller

PCMCIA-ATA Interface

Generators

2 Baud Rate

IDMA

Channels

DMA

8 Serial

SCC3

SCC4

SMC1

SPI

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