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MPC852T Arkusz danych(PDF) 44 Page - Freescale Semiconductor, Inc |
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MPC852T Arkusz danych(HTML) 44 Page - Freescale Semiconductor, Inc |
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44 / 80 page ![]() MPC852T Hardware Specifications, Rev. 3.1 44 Freescale Semiconductor CPM Electrical Characteristics 14.2 IDMA Controller AC Electrical Specifications Table 17 provides the IDMA controller timings as shown in Figure 40 through Figure 43. Figure 40. IDMA External Requests Timing Diagram Table 17. IDMA Controller Timing Num Characteristic All Frequencies Unit Min Max 40 DREQ setup time to clock high 7 — ns 41 DREQ hold time from clock high 1 1 Applies to high-to-low mode (EDM=1) 3 — ns 42 SDACK assertion delay from clock high — 12 ns 43 SDACK negation delay from clock low — 12 ns 44 SDACK negation delay from TA low — 20 ns 45 SDACK negation delay from clock high — 15 ns 46 TA assertion to falling edge of the clock setup time (applies to external TA) 7 — ns 41 40 DREQ (Input) CLKO (Output) |
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