MCP18480 datasheet(2/64 Pages) MICROCHIP

2 / 64 page

MCP18480

DS20091B-page 2

 2003 Microchip Technology Inc.

Internal comparators are incorporated to add hystere-

sis for adjusting the Undervoltage Lockout (UVLO)

threshold. The external N-channel MOSFET is turned

on when the input is below the user-programmable,

Overvoltage

threshold

and

above

the

user-

programmable, Undervoltage threshold.

The PWRGOOD pin indicates the status of the

MCP18480 and is active when the device has com-

pleted power-up and the system is not in an Undervolt-

age, Overvoltage or current-limit condition.

PWRGOOD can be externally configured to either

active-high or active-low to accommodate external cir-

cuitry (power supplies) that have either enabling logic.

A block diagram of the MCP18480 is shown below.

MCP18480 Block Diagram

VPOS

UVTH

UVD

OVTH

VNEG

GATE

VFB

MCP18480

UVHYS

VREFOUT

VREFIN

SENSE

TIMER

RDISCH

ISET

PWRGOOD (1)

DRAINTH

12V

Regulator

12VOUT

Reg.

5VOUT

Latch

Current Limit Timer

ENABLE

RESTART

VPOS

OVO

PWRGOOD

Output Block

VNEG

BIAS

Undervoltage

Overvoltage

Current Limit

GATE

Drive

Timer

FET Good

Circuit Breaker

SENSE

Internal

Bias

Generation

Note 1: The PWRGOOD output pin can be either active-high or active-low. This polarity is determined by the

voltage (either the level on the VREFIN pin or level on the VNEG pin) on the ISET pin:

- Connecting the external RISET resistor to VREFIN configures the PWRGOOD pin as active-low

- Connecting the external RISET resistor to VNEG configures the PWRGOOD pin as active-high

(Section 6.8.3)

(Section 6.8.8)

(Section 6.8.2)

(Section 6.8.1)

(Section 6.8.4)

(Section 6.8.9)

(Section 6.8.5)

(Section

6.8.6)

(Section 6.8.7)

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