| Zakładka z wyszukiwarką danych komponentów |
|
T1024 Arkusz danych(PDF) 39 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
T1024 Arkusz danych(HTML) 39 Page - Freescale Semiconductor, Inc |
|
39 / 49 page ![]() 3.1.7 Interrupt Status Register (CPLD_INTSR) NOTE INTSR register is related with system IRQ0(CPLD_INT1_N) signal, when interrupt occurs, IRQ0 will be logic 0 until all interrupts of INTSR register clear. Address: 0h base + 12h offset = 12h Bit 0 1 2 3 4 5 6 7 Read THERM_INT RTC_INT XGT1_INT XGT2_INT Reserved TDMR1_INT TDMR2_INT Write Reset 0 0 0 0 0 0 0 0 CPLD_INTSR field descriptions Field Description 0 THERM_INT 0 No interrupt occurs. 1 Board over temperature interrupt occurs. 1 RTC_INT 0 No interrupt occurs. 1 RTC interrupt occurs. 2 XGT1_INT 0 No reset occurs. 1 10G BASE-T PHY1(AQR105) interrupt occurs. 3 XGT2_INT 0 No reset occurs. 1 2.5G SGMII PHY1(AQR105) interrupt occurs. 4–5 - This field is reserved. 6 TDMR1_INT 0 No reset occurs. 1 TDM riser card interrupt 1 occurs. 7 TDMR2_INT 0 No reset occurs. 1 TDM riser card interrupt 2 occurs. Chapter 3 CPLD Specification QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015 Freescale Semiconductor, Inc. 39 |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |