ADRF5740BCCZN-R7 datasheet(5/13 Pages) AD

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Data Sheet

ADRF5740

Rev. 0 | Page 5 of 13

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

Positive Supply Voltage

−0.3 V to +3.6 V

Negative Supply Voltage

−3.6 V to +0.3 V

Digital Control Input Voltage

−0.3 V to VDD + 0.3 V

RF Power1 (f = 100 MHz to 50 GHz,

TCASE = 85°C2)

Input at ATTIN

Steady State, Average

25 dBm

Steady State, Peak

25 dBm

Hot Switching, Average

25 dBm

Hot Switching, Peak

25 dBm

Input at ATTOUT

Steady State, Average

17 dBm

Steady State, Peak

17 dBm

Hot Switching, Average

17 dBm

Hot Switching, Peak

17 dBm

RF Power Under Unbiased Condition1

(VDD, VSS = 0 V)

Input at ATTIN

18 dBm

Input at ATTOUT

10 dBm

Temperature

Junction (TJ)

135°C

Storage

−65°C to +150°C

Reflow

260°C

Continuous Power Dissipation (PDISS)

0.25 W

For power derating over frequency, see Figure 2 and Figure 3. Applicable for

all ATTIN and ATTOUT power specifications.

For 105°C operation, the power handling degrades from the TCASE = 85°C

specifications by 3 dB.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

ELECTROSTATIC DISCHARGE (ESD) RATINGS

The following ESD information is provided for handling of

ESD-sensitive devices in an ESD protected area only.

Human body model (HBM) per ESDA/JEDEC JS-001.

Field induced charged device model (FICDM) per ESDA/JEDEC

JS-002.

ESD Ratings for ADRF5740

Table 4. ADRF5740, 16-Terminal LGA

ESD Model

Withstand Threshold (V)

HBM

ATTIN and ATTOUT Pins

±250

Supply and Control Pins

±2000

FICDM

±1250

THERMAL RESISTANCE

Thermal performance is directly linked to PCB design and

operating environment. Careful attention to PCB thermal

design is required.

θJC is the junction to case bottom (channel to package bottom)

thermal resistance.

Table 5. Thermal Resistance

Package Type

θJC1

Unit

CC-16-6

200

°C/W

θJC was determined by simulation under the following conditions: the heat

transfer is due solely to thermal conduction from the channel through the

ground pad to the PCB. The ground pad is held constant at 85°C operating

temperature.

POWER DERATING CURVES

–16

–14

–12

–10

–8

–6

–4

–2

10k

100M

10G

FREQUENCY (Hz)

ATTIN

ATTOUT

Figure 2. Power Derating vs. Frequency, Low Frequency Detail, TCASE = 85°C

–16

–14

–12

–10

–8

–6

–4

–2

FREQUENCY (GHz)

ATTIN

ATTOUT

Figure 3. Power Derating vs. Frequency, High Frequency Detail, TCASE = 85°C

ESD CAUTION

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