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FUSB3307 Arkusz danych(PDF) 5 Page - ON Semiconductor |
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FUSB3307 Arkusz danych(HTML) 5 Page - ON Semiconductor |
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5 / 21 page ![]() FUSB3307 www.onsemi.com 5 PIN FUNCTION DESCRIPTION SOIC Pin Number QFN Pin Number Pin Name I/O Type Description 1 14 VCC Supply Output voltage (Input voltage to the FUSB3307). This pin is tied to the output of the power source to monitor its output voltage and supply internal bias to the FUSB3307 via the VDD pin. 4 19 VDD Supply Internal supply voltage regulator output. This pin should be connected to an 1 mF external capacitor 2 4, 15, DAP GND Ground Ground 14 12 CATH Open Drain Output Feedback to control the power supply. Typically an opto−coupler cathode on the secondary side is connected to this pin to provide feedback signal to the primary side PWM controller. Alternatively, this can be connected to the error amplifier output of a DC−DC regulator (often called the compensation pin) or with an invert- ing circuit to the DC−DC feedback (FB) pin. 11 8 VFB Input Output Voltage Sensing Signal. This pin is used for constant voltage (CV) regula- tion, and it is tied to the internal CV loop amplifier non−inverting input terminal. It is tied to the output voltage external 1:10 resistor divider and a compensation circuit 12 9 IFB Input Constant Current Amplifying Signal. The voltage level at this pin is the amplified current sense signal used for providing an external compensation circuit. Internal- ly this pin is tied to the non−inverting input of the current loop error amplifier. 10 7 IS− Input Current sensing amplifier negative terminal. Connect this pin directly to the nega- tive end of the current sense resistor with a short PCB trace 9 6 IS+ Input Current sensing amplifier positive terminal. Connect this pin directly to the posi- tive end of the current sense resistor with a short PCB trace 3 17 GATE Output Gate drive signal to drive the gate of an NFET load switch 13 11 DISC Open Drain I/O Discharge pin. This pin should be tied to a small (40 W) external resistor that is connected to VBUS after the load switch to discharge VBUS at the connector 7 3 CC1 I/O Configuration Channel 1. This pin is used to detect USB Type−C devices and communicate over USB PD 8 5 CC2 I/O Configuration Channel 2. This pin is used to detect USB Type−C devices and communicate over USB PD 5 20 D+/PDIV1 D+: I/O PDIV1: Input Different functionality available with Trim option (see Application Information section and note at the bottom of Table 6 below): D+: Connected to D+ for BC1.2 or resistor divider mode PDIV1: Programmable pin to select different USB Power Delivery Power (PDP) values 6 2 D−/PDIV0 D−: I/O PDIV0: Input Different functionality available upon request: D−: Connected to D− for BC1.2 or resistor divider mode PDIV0: Programmable pin to select different USB Power Delivery Power (PDP) values N/A 10 PDIV2 Input Programmable pin to select different USB Power Delivery Power (PDP) values N/A 16 NTC I/O Pin connected to external NTC resistor to sense PCB or connector temperature ORDERING INFORMATION Part Number Top Mark Operating Temperature Range Package Packing Method FUSB3307D6MX FUSB3307D6MX −40°C to 85°C SOIC−14 NB (Pb−Free) Tape and Reel FUSB3307D6VMNWTWG (In Development) 3307 D6V −40°C to 105°C QFNW20 (Pb−Free) Tape and Reel FUSB3307D6MNWTWG (In Development) 3307 D6 −40°C to 85°C QFNW20 (Pb−Free) Tape and Reel Other trim (see note at the bottom of Table 6) or package options − − Please contact ON Semiconductor sales − |
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