FUSB3307 datasheet(11/21 Pages) ONSEMI

11 / 21 page

FUSB3307

www.onsemi.com

Power Up and Assumptions

For Figure 5, the focus is on only the secondary side of this

power source and only on the interactions with the

FUSB3307 device. For Figure 6, only the interconnections of

the FUSB3307 with the buck−boost shown will be discussed,

not the buck−boost operation. It is assumed all other

functionality of these AC/DC and DC/DC designs is known.

For Figure 5, upon application of an AC source, the

secondary side VCC starts at 5 V and for Figure 6, upon

application of input VBAT, the buck−boost regulates VCC

at 5 V for USB−C operation. The FUSB3307 takes its input

from the resistor divider ratio comprising of R8 and R9 in

Figure 5 and Figure 6 above. In Figure 5, FUSB3307

controls the CATH pin current through the opto−coupler,

R11 and R10 resistors for providing the feedback to the

primary side controller to regulate to 5 V as shown in

Figure 7.

Figure 7. Constant Voltage / Constant Current

(CV/CC) section of Application Diagram

In Figure 6, FUSB3307 controls the CATH pin voltage

which is tied to the COMP pin of the buck−boost which

directly regulates the output voltage to 5 V. The ratio of

R9:(R8+R9) is expected to be 1:10 to achieve 5 V on VCC

upon power up which is typically R8 = 120 kohms and R9

= 13.3 kohms.

In Figure 6, the buck−boost has its feedback FB pin which

has the resistor that also expects a 1:10 resistor divider in

typical default operation. However this buck−boost resistor

divider is set to 1:50 ratio to set the upper limit of the voltage

while the FUSB3307 directly controls the PWM operation

within the buck−boost. If direct COMP pin control of the

buck−boost is not desirable, then the FUSB3307 can control

the FB pin via a simple external circuit. Please contact

ON Semiconductor Field Application Engineers for more

details.

FUSB3307 will not attach to any Sink devices unless 5 V

(4.75 V to 5.5 V voltage range) is first attained on its VCC

pin since that is the basis of both the USB Type C and USB

Power Delivery (PD) specifications. From this 5 V on VCC,

the FUSB3307 derives its VDD voltage which is used for

powering the internal circuitry as illustrated by this section

of the block diagram shown in Figure 8.

Figure 8. VDD Generation with FUSB3307

It is expected that a capacitor, C3 is connected externally

(typically 1

mF) from VDD to ground to provide energy

storage. VDD is regulated to be at the appropriate voltage for

the internal circuitry for any USB PD contract from 3.3 V

when in a USB PD Programmable Power Supply (PPS)

contract to the highest PPS voltage of 21 V.

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