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24CS512 Arkusz danych(PDF) 34 Page - Microchip Technology

Numer części 24CS512
Szczegółowy opis  512-Kbit, 3.4MHz I2C Serial EEPROM with 128-Bit Serial Number and Enhanced Software Write Protection
PDF  66 Pages
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Producent  MICROCHIP [Microchip Technology]
Strona internetowa  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24CS512 Arkusz danych(HTML) 34 Page - Microchip Technology

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24CS512
DS20005769C-page 34
 2018-2021 Microchip Technology Inc.
10.4.2
DETERMINING THE LOCK STATE
OF THE SECURITY REGISTER
The check lock operation follows the same sequence
as the lock operation (including ‘0110b’ in the A11
through A8 bits of the word address) with the exception
that only the device address byte and the first word
address byte (byte 0) need to be transmitted to the
device. An ACK response to the word address byte
indicates the lock has not been set while a NACK
response indicates the lock has been set. If the lock
has already been set, it cannot be undone. The check
lock operation is completed by the host sending a Stop
condition to the device. This sequence is shown in
Figure 10-4.
FIGURE 10-4:
DETERMINING THE SECURITY REGISTER LOCK STATE
Note:
Only the device address byte and the first
word address byte (byte 0) should be sent
to determine the lock state of the Security
register. Sending the second word
address byte (byte 1) and a data byte can
inadvertently lock the Security register.
MSb
MSb
12
3
4
5
6
7
8
91
2
3
4
5
6
7
8
9
Device Address Byte
Word Address – Byte 0
10
1
1
0
0x
x
x
x
A2 A1 A0
01
10 0/1
ACK from
Client if
Unlocked
ACK
from
Client
Start by
Host
Stop by
Host
NACK from
Client if
Locked



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