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LTC9101-1/

LTC9102/LTC9103

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

GATE[12:1] (Pins 50, 43, 42, 35, 34, 27, 26, 19, 18,

11, 10, 3 Respectively): Gate Drive, channel n. Connect

GATEn to the gate of the external MOSFET for channel n.

When the MOSFET is turned on, the gate voltage is driven

to 12V (typ) above VEE. During a current limit condition,

the voltage at GATEn will be reduced to maintain constant

current through the external MOSFET. If the fault timer

expires, GATEn is pulled down, turning the MOSFET off

and raising a port fault event. If the channel is unused,

the GATEn pin must float.

LTC9103 EXCLUSIVE

VSSK[8:1](Pins47,46,39,38,15,14,7,6Respectively):

See LTC9102 VSSK[12:1].

SENSE[8:1] (Pins 48, 45, 40, 37, 16, 13, 8, 5

Respectively): See LTC9102 SENSE[12:1].

OUT[8:1] (Pins 49, 44, 41, 36, 17, 12, 9, 4 Respectively):

See LTC9102 OUT[12:1].

GATE[8:1] (Pins 50, 43, 42, 35, 18, 11, 10, 3

Respectively): See LTC9102 GATE[12:1].

COMMON PINS

NC, DNC (LTC9101-1 Pin 4; LTC9102 Pins 53, 54;

LTC9103 Pins 19–34, 53, 54): All pins identified with

“NC” or “DNC” must be left unconnected.

LTC9102 EXCLUSIVE

VSSK[12:1] (Pins 47, 46, 39, 38, 31, 30, 23, 22, 15,

14, 7, 6 Respectively): Kelvin Sense to VEE. Connect to

VEE side of sense resistor for channel n through a 0.1Ω

resistor. Do not connect directly to VEE plane. See Kelvin

Sense layout requirements.

SENSE[12:1] (Pins 48, 45, 40, 37, 32, 29, 24, 21, 16,

13, 8, 5 Respectively): Current Sense Input, channel n.

SENSEn monitors the external MOSFET current via a 0.1Ω

sense resistor between SENSEn and VSSKn. If the voltage

across the sense resistor reaches the current limit thresh-

old ILIM-2P, the GATEn pin voltage is lowered to maintain

constant current in the external MOSFET. See Applications

Information for further details. If the channel is unused,

tie SENSEn to VEE.

OUT[12:1] (Pins 49, 44, 41, 36, 33, 28, 25, 20, 17,

12, 9, 4 Respectively): Output Voltage Monitor, channel

n. Connect OUTn to the output channel. A current limit

foldback circuit limits the power dissipation in the external

MOSFET by reducing the current limit threshold when the

drain-to-source voltage exceeds 10V. A port power good

event is raised when the voltage from OUTn to VEE drops

below 2.4V (typ). A 500k resistor is connected internally

from OUTn to AGND when the channel is idle. If the chan-

nel is unused, the OUTn pin must float.

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