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January 18, 2011

CPS-10Q

CPS-10Q Datasheet

2010 Integrated Device Technology, Inc. All rights reserved.

15 Serial RapidIO Ports

Overview

The CPS-10Q’s SERDES are in full compliance to the RapidIO AC specifications for the LP-Serial physical layer [5]. This section provides those spec-

ifications for reference. The electrical specifications cover both single and multiple-lane links. Two transmitters (short run and long run) and a single

receiver are specified for each of three baud rates, 1.25, 2.50, and 3.125 GBaud.

Two transmitter specifications allow for solutions ranging from simple chip-to-chip interconnect to driving two connectors across a backplane. A single

receiver specification is given that will accept signals from both the short run and long run transmitter specifications.

The short run transmitter setting should be used mainly for chip-to-chip connections on either the same printed circuit board or across a single

connector. This covers the case where connections are made to a mezzanine (daughter) card. The minimum swings of the short run specification

reduce the overall power used by the transceivers.

The long run transmitter specifications use larger voltage swings that are capable of driving signals across backplanes. This allows a user to drive

signals across two connectors and a backplane. The CPS-10Q can drive beyond the specification distance of at least 50 cm at all baud rates. Please

use IDT’s Simulation Kit IO models to determine reach and signal quality for a given PCB design.

Signal Definitions

LP-Serial links uses differential signaling. This section defines terms used in the description and specification of differential signals. Differential Peak-

Peak Voltage of Transmitter or Receiver shows how the signals are defined. The figure shows waveforms for either a transmitter output (TD and TD)

or a receiver input (RD and RD). Each signal swings between A Volts and B Volts where A > B. Using these waveforms, the definitions are as follows:

1. The transmitter output signals and the receiver input signals TD, TD, RD and RD each have a peak-to-peak swing of A - B Volts

2. The differential output signal of the transmitter, VOD, is defined as VTD-VTD.

3. The differential input signal of the receiver, VID, is defined as VRD-VRD.

4. The differential output signal of the transmitter and the differential input signal of the receiver each range from A - B to -(A - B) Volts.

5. The peak value of the differential transmitter output signal and the differential receiver input signal is A - B Volts

6. The peak-to-peak value of the differential transmitter output signal and the differential receiver input signal is 2 * (A - B) Volts

Figure 14 Differential Peak-Peak Voltage of Transmitter or Receiver

To illustrate these definitions using real values, consider the case of a CML (Current Mode Logic) transmitter that has a common mode voltage of 2.25

V and each of its outputs, TD and TD, has a swing that goes between 2.5V and 2.0V. Using these values, the peak-to-peak voltage swing of the

signals TD and TD is 500 mV p-p. The differential output signal ranges between 500 mV and -500 mV. The peak differential voltage is 500 mV. The

peak-to-peak differential voltage is 1000 mV p-p.

Equalization

With the use of high speed serial links, the interconnect media will cause degradation of the signal at the receiver. Effects such as Inter-Symbol Inter-

ference (ISI) or data dependent jitter are produced. This loss can be large enough to degrade the eye opening at the receiver beyond what is allowed

in the specification. To negate a portion of these effects, equalization can be used. The equalization technique implemented in the CPS-10Q is Pre-

emphasis on the transmitter (under register control).

A Volts

B Volts

TD or RD

TD or RD

Differential Peak-Peak = 2 * (A – B)