L6730TR datasheet(7/52 Pages) STMICROELECTRONICS

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L6730 - L6730B

Pin connections and functions

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Pin connections and functions

Figure 2.

Pins connection (Top view)

In the L6730B the multifunction pin is: CC/OVP/UVLO.

Table 3.

Pins connection

Pin n.

Name

Description

PGOOD DELAY

A capacitor connected between this pin and GND introduces a delay between

the internal PGOOD comparator trigger and the external signal rising edge. No

delay can be introduced on the falling edge of the PGOOD signal. The delay

can be calculated with the following formula:

SYNCH

Two or more devices can be synchronized by connecting the SYNCH pins

together. The device operating with the highest FSW will be the Master device.

The Slave devices will operate at 180° phase shift from the Master. The best

way to synchronize devices is to set their FSW at the same value. If it is not

used, the SYNCH pin can be left floating.

SINK/OVP/UVLO

L6730

CC/OVP/UVLO

L6730B

With this pin it is possible:

– To enable-disable the sink mode current capability after SS (L6730);

– To enable-disable the constant current OCP after SS (L6730B);

– To enable-disable the latch mode for the OVP;

– To set the UVLO threshold for the 5V BUS and 12V BUS.

The device captures the analog value present at this pin at the start-up when

VCC meets the UVLO threshold.

HTSSOP20

OSC

SS/INH

CO MP

GND

SYNCH

PGOOD DELAY

TM ASK

EAREF

PGOOD

PHASE

HGATE

BOOT

VCC

VCCDR

LGATE

OCL

OCH

PGND

HTSSOP20

OSC

SS/INH

CO MP

GND

SYNCH

PGOOD DELAY

TM ASK

EAREF

PGOOD

PHASE

HGATE

BOOT

VCC

VCCDR

LGATE

OCL

OCH

PGND

SINK/OVP/UVLO

()

PGDelay

⋅

= 5

[µs]

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