| Zakładka z wyszukiwarką danych komponentów |
|
L6730TR Arkusz danych(PDF) 8 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L6730TR Arkusz danych(HTML) 8 Page - STMicroelectronics |
|
8 / 52 page ![]() Pin connections and functions L6730 - L6730B 8/52 4 TMASK The user can select two different values for the leading edge blanking time on the peak overcurrent protection by connecting this pin to VCCDR or GND. The device captures the analog value present at this pin at the start-up when VCC meets the UVLO threshold. 5 GND All of the internal references are referenced to this pin. 6FB This pin is connected to the error amplifier inverting input. Connect it to Vout through the compensation network. This pin is also used to sense the output voltage in order to manage the over voltage conditions and the PGood signal. 7COMP This pin is connected to the error amplifier output and used to compensate the voltage control loop. 8 SS/INH The soft-start time is programmed connecting an external capacitor from this pin and GND. The internal current generator forces a current of 10 µA through the capacitor. This pin is also used to inhibit the device: when the voltage at this pin is lower than 0.5V the device is disabled. 9 EAREF It is possible to set two internal references 0.6V / 1.2V or provide an external reference from 0V to 2.5V: – VEAREF from 0% to 80% of VCCDR −> External Reference – VEAREF from 80% to 95% of VCCDR −> VREF=1.2V – VEAREF from 95% to 100% of VCCDR −> VREF=0.6V An internal clamp limits the maximum VEAREF at 2.5V (typ.). The device captures the analog value present at this pin at the start-up when VCC meets the UVLO threshold. 10 OSC Connecting an external resistor from this pin to GND, the external frequency can be increased according with the following equation: Connecting a resistor from this pin to VCCDR (5V), the switching frequency can be lowered according with the following equation: If the pin is left open, the switching frequency is 400 KHz. Normally this pin is at a voltage of 1.2V. In OVP the pin is pulled up to 4.5V (only in latched mode). Don’t connect a capacitor from this pin to GND. Table 3. Pins connection ) ( 10 88 . 9 400 6 Ω ⋅ + = K R KHz Fsw OSC ) ( 10 01 . 3 400 7 Ω ⋅ − = K R KHz Fsw OSC |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |