PSD835G2 datasheet(73/102 Pages) STMICROELECTRONICS

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PSD835G2 Arkusz danych(PDF) 73 Page - STMicroelectronics

Numer części	PSD835G2

Szczegółowy opis	Flash PSD, 5V Supply, for 8-bit MCUs 4 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM

PDF	102 Pages

Scroll/Zoom	100%

Producent	STMICROELECTRONICS [STMicroelectronics]

Strona internetowa	http://www.st.com

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PSD835G2

Input Control Signals

The PSD provides the option to turn off the ad-

dress input (A7-A0) and input control signals

(CNTL0, CNTL1, CNTL2, Address Strobe (ALE/

AS, PD0) and DBE) to the PLD to save AC power

consumption. These signals are inputs to the PLD

AND Array. During Power-down mode, or, if any of

them are not being used as part of the PLD logic

equation, these signals should be disabled to save

AC power. They are disconnected from the PLD

AND Array by setting Bits 0, 2, 3, 4, 5, and 6 to a

‘1’ in PMMR2.

Table 46. APD Counter Operation

APD Enable Bit

ALE PD Polarity

ALE Level

APD Counter

Not Counting

Pulsing

Not Counting

Counting (Generates PDN after 15 Clocks)

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