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LP87702 Arkusz danych(PDF) 4 Page - Texas Instruments |
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LP87702 Arkusz danych(HTML) 4 Page - Texas Instruments |
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4 / 99 page ![]() 6 Pin Configuration and Functions 9 10 11 12 13 14 2 3 4 5 6 1 7 20 19 18 17 23 21 22 29 28 27 25 32 31 30 GPO0 NRST VIN_B1 VIN_B1 SW_B1 SW_B0 SW_B0 VIN_B0 VIN_B0 THERMAL PAD 8 16 SW_B1 24 26 15 PG0 VMON1 VMON2 PGND_BST SW_BST PG1 (GPO1) Figure 6-1. RHB Package 32-Pin VQFN With Thermal Pad Top View Table 6-1. Pin Functions PIN TYPE DESCRIPTION NAME NUMBER AGND 4 G Ground CLKIN 22 D/I/O External clock input. Alternative function is general purpose digital output 2 (GPO2). Second alternative function is watchdog disable (WD_DIS) EN1 19 D/I Programmable Enable 1 signal. FB_B0 2 A Output voltage feedback for Buck0. FB_B1 3 A Output voltage feedback for Buck1. GPO0 12 D/O General purpose digital output 0. nINT 1 D/O Open-drain interrupt output. Active LOW. NRST 11 D/I Reset signal for the device. PG0 29 D/O Programmable power-good indication signal. PG1 32 D/O Programmable power-good indication signal. Alternative function is general purpose digital output 1 (GPO1). PGND_B0 23, 24 P/G Power ground for Buck0. PGND_B1 17, 18 P/G Power Ground for Buck1. PGND_BST 10 P/G Power ground for boost. SCL 20 D/I Serial interface clock input for I2C access. Connect a pullup resistor. Alternative function is programmable to the enable 2 signal. SDA 21 D/I/O Serial interface data input and output for I2C access. Connect a pullup resistor. Alternative function is programmable to the enable 3 signal. SW_B0 25, 26 P/O Buck0 switch node. SW_B1 15, 16 P/O Buck1 switch node. SW_BST 9 P/I Boost input. Bypass switch input when this mode is selected. VANA 5 P Supply voltage for analog and digital blocks. Must be connected to same node with VIN_Bx. LP87702-Q1 SNVSAL1C – DECEMBER 2017 – REVISED JUNE 2021 www.ti.com 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP87702-Q1 |
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