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USB97C102 Arkusz danych(PDF) 7 Page - SMSC Corporation |
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USB97C102 Arkusz danych(HTML) 7 Page - SMSC Corporation |
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7 / 80 page ![]() SMSC DS – USB97C102 Page 7 Rev. 03/23/2000 QFP PIN NUMBER SYMBOL PIN DESCRIPTION BUFFER TYPE 28 RESET_IN Power on reset; active high This signal is used by the system to reset the chip. It also generates an internal POR. I 29 TST_OUT XNOR Chain output This signal is used for testing the chip via an internal XNOR Chain. O8 26 nTEST Test input This signal is a manufacturing test pin. User can pull it high or leave it unconnected. IP BUFFER TYPE DESCRIPTIONS Table 2 - USB97C102 Buffer Type Description BUFFER DESCRIPTION I Input (no pull-up) IP Input 90µA with internal pull-up O8 Output with 8mA drive I/O8 Input/output with 8mA drive I/O16 Input/output with 16mA drive O24 Output, 24mA sink, 12mA source. I/ODP24 Input/Output drain , 24mA sink, 12mA source with 90µA pull-up ICLKx XTAL clock input OCLKx XTAL clock output ICLK Clock input (TTL levels) IOUSB Defined in USB specification V1.1 CODE DEBUGGER INTERFACE This interface is made available by driving NTEST=0 and TSTOUT=0 (In this mode, TSTOUT is an input of the chip). In this mode, the pin functions are defined as follows: QFP PIN NUMBER SYMBOL PIN DESCRIPTION BUFFER TYPE 64, 69, 70, 63, 73, 43, 72, 71, 62- 58, 56-54 FA[15:0] 8051 Address Bus I 42 NFRD Data Read Strobe; active low I 66 NFWR Data Write; active low I 112-115, 117-120 FD[7:0] Data Bus I/O8 44 nFCE 8051 T1IN timer signal O8 75 FA19 8051 T0IN timer signal O8 74 FA18 8051 WAKE interrupt signal O8 68 FA17 8051 INT1 interrupt signal O8 65 FA16 8051 INT0 interrupt signal O8 |
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