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DSP56362P Arkusz danych(PDF) 1 Page - Freescale Semiconductor, Inc |
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DSP56362P Arkusz danych(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 152 page  © Freescale Semiconductor, Inc., 2006. All rights reserved. Freescale Semiconductor Technical Data This document contains information on a new product. Specifications and information herein are subject to change without notice. Document Number: DSP56362 Rev. 4, 08/2006 1 Overview Freescale Semiconductor, Inc. designed the DSP56362 to support digital audio applications requiring digital audio compression and decompression, sound field processing, acoustic equalization, and other digital audio algorithms. The DSP56362 uses the high performance, single-clock-per-cycle DSP56300 core family of programmable CMOS digital signal processors (DSPs) combined with the audio signal processing capability of the Freescale Symphony™ DSP family, as shown in Figure 1-1. This design provides a two-fold performance increase over Freescale’s popular Symphony family of DSPs while retaining code compatibility. Significant architectural enhancements include a barrel shifter, 24-bit addressing, instruction cache, and direct memory access (DMA). The DSP56362 offers 100 million instructions per second (MIPS) using an internal 100 MHz clock at 3.3 V. DSP56362 24-Bit Audio Digital Signal Processor Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 2 Signal/Connection Descriptions . . . . . . . . . 2-1 3 Specifications . . . . . . . . . . . . . . . . . . . . . . . . 3-1 4 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 5 Design Considerations . . . . . . . . . . . . . . . . 5-1 6 Ordering Information . . . . . . . . . . . . . . . . . . 6-1 A Power Consumption Benchmark . . . . . . . . A-1 B IBIS Model . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 |
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