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MPC8250 Arkusz danych(PDF) 59 Page - Freescale Semiconductor, Inc |
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MPC8250 Arkusz danych(HTML) 59 Page - Freescale Semiconductor, Inc |
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59 / 60 page ![]() MPC8250 Hardware Specifications, Rev. 1 Freescale Semiconductor 59 Document Revision History 0.9 8/2003 • Table 2: Modification to supply voltage ranges reflected in notes 2, 3, and 4 • Addition of VCCSYN to “Note: Core, PLL, and I/O Supply Voltages” following Table 2 • Addition of Figure 2 • Addition of note 1 to Table 3 • Table 4: Changes to θJA. Addition of θJB and θJC • Table 7, Figure 8: Addition of sp42a/sp43a • Figure 3 through Figure 8: Addition of notes or modifications • Table 9: Change to sp10 • Table 14, Table 16, and Table 18: Removal of PLL bypass mode from clock tables • Table 19 and Table 21: Addition of note 1 • Addition of SPICLK to PC19 in Table 19 and Table 21. It is documented correctly in the MPC8260 PowerQUICC II™ Family Reference Manual but had previously been omitted from Table 19 and Table 21. 1 3/29/2005 Document template update Table 23. Document Revision History (continued) Revision Date Substantive Changes |
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