LPC2917 datasheet(42/68 Pages) PHILIPS

42 / 68 page

LPC2917_19_1

Preliminary data sheet

Rev. 1.01 — 15 November 2007

42 of 68

NXP Semiconductors

LPC2917/19

ARM9 microcontroller with CAN and LIN

• Generation of 10 and 2 test-base clocks, selectable from several embedded clock

sources

• Crystal oscillator with power-down

• Control PLL with power-down

• Very low-power ring oscillator, always on to provide a ’safe clock’

• Seven fractional clock dividers with L/D division

• Individual source selector for each base clock, with glitch-free switching

• Autonomous clock-activity detection on every clock source

• Protection against switching to invalid or inactive clock sources

• Embedded frequency counter

• Register write-protection mechanism to prevent unintentional alteration of clocks

Remark: Any clock-frequency adjustment has a direct impact on the timing of on-board

peripherals such as the UARTs, SPI, watchdog, timers, CAN controller, LIN master

controller, ADCs or flash-memory interface.

8.8.4.2

Description

The clock generation unit provides 10 internal clock sources as described in Table 23.

[1]

Maximum frequency that guarantees stable operation of the LPC2917/19.

[2]

Fixed to low-power oscillator.

For generation of these base clocks, the CGU consists of primary and secondary clock

generators and one output generator for each base clock.

Table 23.

CGU base clocks

Number Name

Frequency

(MHz) [1]

Description

BASE_SAFE_CLK

0.4

Base safe clock (always on)

BASE_SYS_CLK

Base system clock

BASE_PCR_CLK

0.4 [2]

Base PCR subsystem clock

BASE_IVNSS_CLK

Base IVNSS subsystem clock

BASE_MSCSS_CLK

Base MSCSS subsystem clock

BASE_UART_CLK

Base UART clock

BASE_SPI_CLK

Base SPI clock

BASE_TMR_CLK

Base timers clock

BASE_ADC_CLK

4.5

Base ADCs clock

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