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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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TAS5706PAPR Arkusz danych(PDF) 39 Page - Texas Instruments |
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TAS5706PAPR Arkusz danych(HTML) 39 Page - Texas Instruments |
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39 / 62 page  www.ti.com I 2C SERIAL CONTROL COMMAND CHARACTERISTICS TAS5706 SLOS550A – DECEMBER 2007 – REVISED DECEMBER 2007 The DAP has two groups of I2C commands. One set is commands that are designed specifically to be operated while audio is streaming and that have built-in mechanisms to prevent noise, clicks, and pops. The other set does not have this built-in protection. Commands that are designed to be adjusted while audio is streaming: • Master volume • Master mute • Individual channel volume • Individual channel mute Commands that are normally issued as part of initialization: • Serial data interface format • De-emphasis • Sample-rate conversion • Input multiplexer • Output multiplexer • Biquads • Down mix • Channel delay • Enable/disable dc blocking • Hard/soft unmute from clock error • Enable/disable headphone outputs Table 2. Serial Control Interface Register Summary (1) NO. OF INITIALIZATION SUBADDRESS REGISTER NAME CONTENTS BYTES VALUE A u indicates unused bits. 0x00 Clock control register 1 Description shown in subsequent section 0x6C 0x01 Device ID register 1 Description shown in subsequent section 0x28 0x02 Error status register 1 Description shown in subsequent section 0x00 0x03 System control register 1 1 Description shown in subsequent section 0xA0 0x04 Serial data interface 1 Description shown in subsequent section 0x05 register 0x05 System control register 2 1 Description shown in subsequent section 0x40 0x06 Soft mute register 1 Description shown in subsequent section 0x00 0x07 Master volume 1 Description shown in subsequent section 0xFF (mute) 0x08 Channel 1 vol 1 Description shown in subsequent section 0x30 (0 dB) 0x09 Channel 2 vol 1 Description shown in subsequent section 0x30 (0 dB) 0x0A Channel 3 vol 1 Description shown in subsequent section 0x30 (0 dB) 0x0B Channel 4 vol 1 Description shown in subsequent section 0x30 (0 dB) 0x0C HP volume 1 Description shown in subsequent section 0x30 (0 dB) 0x0D Channel 6 vol 1 Description shown in subsequent section 0x30 (0 dB) 0x0E Volume configuration 1 Description shown in subsequent section 0x91 register 0x0F 1 Reserved(2) 0x10 Modulation limit register 1 Description shown in subsequent section 0x02 0x11 IC delay channel 1 1 Description shown in subsequent section 0x4C 0x12 IC delay channel 2 1 Description shown in subsequent section 0x34 0x13 IC delay channel 3 1 Description shown in subsequent section 0x1C (1) Biquad definition is given in Figure 47. (2) Reserved registers should not be accessed. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s): TAS5706 |
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