NRF52810-QFAA-R datasheet(62/483 Pages) NORDIC

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Power and clock management

POWER

REG

LDO

DC/DC

DCDCEN

VDD

DCC

GND

DEC4

1.3V System power

Supply

Figure 14: DC/DC regulator setup

5.3.2 System OFF mode

System OFF is the deepest power saving mode the system can enter. In this mode, the system’s core

functionality is powered down and all ongoing tasks are terminated.

The device can be put into System OFF mode using the POWER register interface. When in System OFF

mode, the device can be woken up through one of the following:

1. The DETECT signal, optionally generated by the GPIO peripheral

2. A reset

When the system wakes up from System OFF mode, it gets reset. For more details, see Reset behavior on

page 66.

One or more RAM sections can be retained in System OFF mode depending on the settings in the

RAM[n].POWER registers.

RAM[n].POWER are retained registers, see Reset behavior. Note that these registers are usually

overwritten by the startup code provided with the nRF application examples.

Before entering System OFF mode, the user must make sure that all on-going EasyDMA transactions have

been completed. This is usually accomplished by making sure that the EasyDMA enabled peripheral is not

active when entering System OFF.

5.3.2.1 Emulated System OFF mode

If the device is in debug interface mode, System OFF will be emulated to secure that all required resources

needed for debugging are available during System OFF.

See Debug on page 50 for more information. Required resources needed for debugging include the

following key components: Debug on page 50, CLOCK — Clock control on page 83, POWER — Power

supply on page 61, NVMC — Non-volatile memory controller on page 18, CPU, Flash, and RAM. Since

the CPU is kept on in an emulated System OFF mode, it is recommended to add an infinite loop directly

after entering System OFF, to prevent the CPU from executing code that normally should not be executed.

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NRF52810-QFAA-R Arkusz danych(PDF) 62 Page - Nordic Semiconductor