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7733 Arkusz danych(PDF) 100 Page - Renesas Technology Corp

Numer części 7733
Szczegółowy opis  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  940 Pages
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Producent  RENESAS [Renesas Technology Corp]
Strona internetowa  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7733 Arkusz danych(HTML) 100 Page - Renesas Technology Corp

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7733 Group User's Manual
4–21
INTERRUPTS
____
4.10.1 INTi interrupt request bit’s function
(1) Functions when edge sense is selected
By clearing the level sense/edge sense selection bit to “0,” the edge sense is selected. (Refer to
Figure 4.10.3.)
The interrupt request bit has the same functions as those for the interrupt request bit of internal
interrupts.
When an interrupt occurs, the interrupt request bit is set to “1” and retains this state until the interrupt
request is accepted.
When the interrupt request bit is cleared to “0” by software, an interrupt request is cancelled; when
the interrupt request bit is set to “1” by software, an interrupt request can be generated.
(2) Functions when level sense is selected
By setting the level sense/edge sense selection bit to “1,” the level sense is selected. (Refer to Figure
4.10.3.)
____
The interrupt request bit is ignored. In this case, interrupt requests occur sequentially while pin INTi
____
is at the valid levelV1; when pin INTi’s level changes to the invalid levelV2 with the interrupt request not
accepted, the interrupt request is not held. (Refer to Figure 4.10.4.)
Valid levelV1: The level selected by the polarity selection bit (bit 4 at addresses 7D16 to 7F16)
Invalid levelV2: The reverse level to “valid level”
____
4.10 External interrupts (INTi interrupt)
____
Fig. 4.10.3 INTi Interrupt request
____
Fig. 4.10.4 Re-occurrence of INTi interrupt request when level sense is selected
Pin INTi
Edge detection
circuit
Interrupt
request
Level sense/Edge sense
selection bit
“0”
“1”
Data bus
Interrupt request bit
Level sense
Edge sense
1st interrupt routine
Pin INTi
’s level
Valid
Invalid
Main routine
Interrupt request is accepted.
Return to main routine
2nd interrupt
routine
3rd interrupt
routine
Main routine



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