SPC5702BECLU datasheet(74/98 Pages) FREESCALE

74 / 98 page

MPC560xS Microcontroller Data Sheet Data Sheet, Rev. 1

Preliminary—Subject to Change Without Notice

Electrical Characteristics

Freescale Semiconductor

Figure 18. Pad Output Delay

3.16

AC Timing

3.16.1

IEEE 1149.1 Interface Timing

Table 35. JTAG Interface Timing1

1 These specifications apply to JTAG boundary scan only. JTAG timing specified at V

DD = 3.0 V to 5.5 V, TA = -40 to

105 °C, and CL = 50 pF with SRC = 0b11.

Num

Symbol

Characteristic

Min

Max

Unit

1tJCYC

CC2

TCK Cycle Time

100

—

2tJDC

CC2

TCK Clock Pulse Width (Measured at VDD/2)

3tTCKRISE

CC2

TCK Rise and Fall Times (40% – 70%)

—

4tTMSS, tTDIS

CC2

TMS, TDI Data Setup Time

—

5tTMSH, tTDIH

CC2

TMS, TDI Data Hold Time

—

6tTDOV

CC2

TCK Low to TDO Data Valid

—

7tTDOI

CC2

TCK Low to TDO Data Invalid

—

8tTDOHZ

CC2

TCK Low to TDO High Impedance

—

9tBSDV

CC2

TCK Falling Edge to Output Valid

—

tBSDVZ

CC2

TCK Falling Edge to Output Valid out of High

Impedance

—50

tBSDHZ

CC2

TCK Falling Edge to Output High Impedance

—

tBSDST

CC2

Boundary Scan Input Valid to TCK Rising Edge

—

tBSDHT

CC2

TCK Rising Edge to Boundary Scan Input Invalid

—

VDD/2

VOH

VOL

Rising

Edge

Output

Delay

Falling

Edge

Output

Delay

Pad

Data Input

Pad

Output

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