| Zakładka z wyszukiwarką danych komponentów |
|
LTC6906CS6 Arkusz danych(PDF) 9 Page - Linear Technology |
|
|
|||||||||||||||||||||||||||||
LTC6906CS6 Arkusz danych(HTML) 9 Page - Linear Technology |
|
9 / 12 page ![]() LTC6906 9 6906fa APPLICATIO S I FOR ATIO Achieving the highest accuracy requires controlling po- tential leakage paths. PC board leakage is aggravated by both dirt and moisture. Effective cleaning is a good first step to minimizing leakage, and some PC board manufac- turers offer high impedance or low leakage processing options. Another effective method for controlling leakage is to shunt the leakage current away from the sensitive node through a low impedance path. The LTC6906 provides a signal on the GRD pin for this purpose. Figure 10 shows a PC board layout that uses the GRD pin and a “guard ring” to absorb leakage currents. The guard ring surrounds the SET pin and the end of RSET to which it is connected. The guard ring must have no solder mask covering it to be effective. The GRD pin voltage is held within a few millivolts of the SET pin voltage, so any leakage path between the SET pin and the guard ring generates no leakage current. Bypassing the Power Supply The LTC6906 has on-chip power supply decoupling that eliminates the need for an external decoupling capacitor in most cases. Figure 11 shows a simplified equivalent circuit of the output driver and on-chip decoupling net- work. When the output driver switches from low to high, the 800pF capacitor delivers the current needed to charge the off-chip capacitive load. Within nanoseconds the sys- tem power supply recharges the 800pF capacitor. Figure 9. Supply Current vs Frequency Figure 10. PC Board Layout with Guard Ring Figure 11. Simplified Equivalent of the Output Driver and On-Chip Decoupling Circuit LTC6906 RSET OUT GND DIV LEAKAGE CURRENT NO LEAKAGE CURRENT GUARD RING V+ GRD SET 6906 F10 1 2 3 6 5 4 NO SOLDER MASK OVER THE GUARD RING 6 V+ 1 OUT 300 Ω 20 Ω 800pF fOUT 2 GND ESD DIODES CLOAD V+ 6906 F11 DRIVER LTC6906-1 DECOUPLING NETWORK Figure 12 shows a test circuit for evaluating performance of the LTC6906 with a highly inductive, 330nH power supply. Figure 13 shows the effectiveness of the on-chip decoupling network. For CLOAD = 5pF to 50pF, the output waveforms remain well formed. The extremely low supply current of the LTC6906 allows operation with substantial resistance in the power supply. Figure 14 shows a test circuit for evaluating performance of the LTC6906 with a highly resistive, 100 Ω power supply. Figure 15 shows the effectiveness of the on-chip decoupling network. For CLOAD = 5pF to 50pF, the output waveforms remain well formed. With a 50pF load, a very small (2.5%) slow tail can be seen on the rising edge. The output waveform is still well formed even in this case. The ability of the LTC6906 to operate with a resistive supply permits supplying power via a CMOS logic gate or microcontroller pin. Since the LTC6906 has a turn-on time of less than 200 µsec, this technique can be used to enable the device only when needed and further reduce power consumption. MASTER OSCILLATOR FREQUENCY (kHz) 0 0 10 30 40 50 800 6906 F09 20 400 200 1000 600 1200 60 ÷1 ÷3 ÷10 70 80 V+ = 2.7V |
|
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |