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WM8170 Arkusz danych(PDF) 21 Page - Wolfson Microelectronics plc

Numer części WM8170
Szczegółowy opis  3.3V Integrated Signal Processor for Area Array CCDs
PDF  41 Pages
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Producent  WOLFSON [Wolfson Microelectronics plc]
Strona internetowa  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8170 Arkusz danych(HTML) 21 Page - Wolfson Microelectronics plc

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WM8170
Product Preview Rev 1.0
WOLFSON MICROELECTRONICS LTD
PP Rev 1.0 March 2000
21
The total period (P) of the combined Analogue Correction Loop and Digital Correction Circuitry,
measured in Pixel Periods, is given by the following formula:
P = ( [ANDUR] x 4 + 2
[DIGDUR] )
Pixel Periods
Where:
[ANDUR] is the contents of the Analogue Duration register ANDUR[6:0].
[DIGDUR] is the contents of the Digital Duration register DIGDUR[2:0].
The selection of ANDUR and DIGDUR values is at the discretion of the user, but the following
considerations should be made. The internal up/down counter is 8-bit, which covers 256 steps. The
counter is incremented/decremented ANDUR times per BLCENB falling edge, which implies that the
minimum number of falling edges on BLCENB to guarantee that the analogue loop has reached its
final value is 256/ANDUR. In actual use however, the change in DC conditions through the WM8170
will be relatively small, which will mean that the analogue loop will settle to the new value quicker.
The value chosen for DIGDUR depends on the number of black pixels available, but a larger value
means that any black pixel noise is averaged over a greater number, which will result in a more
accurate error value being stored.
The analogue DC correction loop error voltage within the WM8170 is not subject to drift because it is
derived from a digitally controlled DAC, which implies that once the DC correction circuitry has
settled, the correction circuitry can be turned off. This can be achieved by setting the control bit
STOPDC via the Management Interface. The correction circuitry should be re-enabled after any write
to the PGA register so that DC change due to the different gain is accommodated for.
There are two main ways that the DC correction circuitry can be used. The BLCENB can be activated
either during the optically black lines at the beginning or end of the CCD output field, or during the
optically black pixels at the beginning or end of each video line. Using the first option results in the
DC conditions being established before any active video is present, and since completely optically
black lines are present large values can be programmed to ANDUR and DIGDUR respectfully. With
the second option, smaller values for ANDUR and DIGDUR would have to be used, as the number of
black pixels in each line is limited. With both options, it is recommended that the correction circuitry
be enabled for one frame of video, and then turned off again.
Although the WM8170 only requires a falling edge on BLCENB to initiate the correction circuitry
users may input BLCENB signals which are low for the complete duration of the optically black pixels
if preferred (this signal format is generally available from CCD timing generator devices). In this case
the WM8170 can be programmed to output an error flag on the PTDO pin if the BLCENB input
returns to a high state before both the Analogue and Digital Enables are complete. This allows
checking that the ANDUR and DIGDUR values programmed to the device will not cause a potential
error in the correction circuitry because active video has been included in the internal calculations.
See the Programmable Threshold Detect Output section for details of all error flags available.



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