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XIO2001IPNP Arkusz danych(PDF) 75 Page - Texas Instruments |
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XIO2001IPNP Arkusz danych(HTML) 75 Page - Texas Instruments |
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75 / 131 page ![]() XIO2001 www.ti.com SCPS212D – MAY 2009 – REVISED JANUARY 2010 BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Table 4-38. Subsystem Access Register Description BIT FIELD NAME ACCESS DESCRIPTION 31:16(1) SubsystemID RW Subsystem ID. The value written to this field is aliased to the subsystem ID register at PCI offset 46h (see Section 4.33). 15:0(1) SubsystemVendorID RW Subsystem vendor ID. The value written to this field is aliased to the subsystem vendor ID register at PCI offset 44h (see Section 4.32). (1) These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset. Copyright © 2009–2010, Texas Instruments Incorporated Classic PCI Configuration Space 75 Submit Documentation Feedback Product Folder Link(s): XIO2001 |
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