HT45B0F datasheet(17/23 Pages) HOLTEK

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HT45B0F

Rev. 1.00

June 7, 2011

Managing Receiver Errors

Several types of reception errors can occur within the

UART module, the following section describes the vari-

ous types and how they are managed by the UART.

· Overrun Error - OERR flag

The RXR register is composed of a four byte deep

FIFO data buffer, where four bytes can be held in the

FIFO register, while a 5th byte can continue to be re-

ceived. Before the 5th byte has been entirely shifted

in, the data should be read from the RXR register. If

this is not done, the overrun error flag OERR will be

consequently indicated.

In the event of an overrun error occurring, the follow-

ing will happen:

¨ The OERR flag in the USR register will be set.

¨ The RXR contents will not be lost.

¨ The shift register will be overwritten.

¨ An interrupt will be generated if the RIE bit is set.

The OERR flag can be cleared by an access to the

USR register followed by a read to the RXR register.

· Noise Error - NF flag

Over-sampling is used for data recovery to identify

valid incoming data and noise. If noise is detected

within a frame, the following will occur:

¨ The read only noise flag, NF, in the USR register will

be set on the rising edge of the RXIF bit.

¨ Data will be transferred from the shift register to the

RXR register.

¨ No interrupt will be generated. However this bit

rises at the same time as the RXIF bit which itself

generates an interrupt.

Note that the NF flag is reset by a USR register read

operation followed by an RXR register read operation.

· Framing Error - FERR flag

The read only framing error flag, FERR, in the USR

If two stop bits are selected, both stop bits must be

high. Otherwise the FERR flag will be set. The FERR

flag is buffered along with the received data and is

cleared in any reset.

· Parity Error - PERR flag

The read only parity error flag, PERR, in the USR reg-

ister, is set if the parity of the received word is incor-

rect. This error flag is only applicable if the parity

function is enabled, PREN=1, and if the parity type,

odd or even, is selected. The read only PERR flag is

buffered along with the received data bytes. It is

cleared on any reset, it should be noted that the FERR

and PERR flags are buffered along with the corre-

sponding word and should be read before reading the

data word.

UART Interrupt Structure

Several individual UART conditions can generate a

UART interrupt. When these conditions exist, a low

pulse will be generated on the INT line to get the atten-

tion of the microcontroller. These conditions are a trans-

mitter data register empty, transmitter idle, receiver data

available, receiver overrun, address detect and an RX

pin wake-up. When any of these conditions are created,

if its corresponding interrupt control is enabled and the

stack is not full, the program will jump to its correspond-

ing interrupt vector where it can be serviced before re-

turning to the main program. Four of these conditions

have the corresponding USR register flags which will

generate a UART interrupt if its associated interrupt en-

able control bit in the UCR2 register is set. The two

transmitter interrupt conditions have their own corre-

sponding enable control bits, while the two receiver in-

terrupt conditions have a shared enable control bit.

These enable bits can be used to mask out individual

UART interrupt sources.

The address detect condition, which is also a UART in-

terrupt source, does not have an associated flag, but will

generate a UART interrupt when an address detect con-

dition occurs if its function is enabled by setting the

ADDEN bit in the UCR2 register. An RX pin wake-up,

which is also a UART interrupt source, does not have an

associated flag, but will generate a UART interrupt if the

microcontroller is woken up by a falling edge on the RX

pin, if the WAKE and RIE bits in the UCR2 register are

set. Note that in the event of an RX wake-up interrupt

occurring, there will be a certain period of delay, com-

monly known as the System Start-up Time, for the oscil-

lator to restart and stabilize before the system resumes

normal operation.

Note that the USR register flags are read only and can-

not be cleared or set by the application program, neither

will they be cleared when the program jumps to the cor-

responding interrupt servicing routine, as is the case for

some of the other interrupts. The flags will be cleared

automatically when certain actions are taken by the

UART, the details of which are given in the UART regis-

ter section. The overall UART interrupt can be disabled

or enabled by the related interrupt enable control bits in

the interrupt control registers of the microcontroller to

decide whether the interrupt requested by the UART

module is masked out or allowed.

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