AN3028 datasheet(7/37 Pages) STMICROELECTRONICS

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AN3028

Circuit description

Doc ID 16135 Rev 1

7/37

Circuit description

The power supply is set in flyback topology. The schematic is given in Figure 2, the bill of

materials in Table 2. The input section includes a resistor R1 for inrush current limiting, a

diode bridge (D0) and a Pi filter for EMC suppression (C1, L1, C2). The transformer core is

a standard E16. A transil clamp network (D1, D4) is used for leakage inductance

demagnetization.

The output voltage value is set simply through the R5-R6 voltage divider between the output

terminal and the FB pin, according to the following formula:

Equation 1

The FB pin is the inverting input of an error amplifier whose non-inverting input is an

accurate 3.3 V voltage reference. In the schematic the resistor R5 has been split into R5a

and R5b in order to allow better tuning of the output voltage value. The compensation

network is connected between the COMP pin (which is the output of the error amplifier) and

the GND pin and is made up of C7, C8 and R7.

The output rectifier D3 has been selected according to the calculated maximum reverse

voltage, forward voltage drop and power dissipation and is a power Schottky.

The LIM pin has been left open, thus the current limitation is set to the default value, IDLIM. If

a lower current limitation is required, a resistor of an appropriate value should be connected

between the LIM and GND pins, according to the IDLIM vs. RLIM graphic shown in the

VIPer16LN datasheet.

A small LC filter has been added at the output in order to filter the high-frequency ripple

without increasing the size of the output capacitors and a 100 nF capacitor has been placed

very close to the output connector solder points in order to limit the spike amplitude.

At power-up the DRAIN pin supplies the internal HV startup current generator which

charges the C3 capacitor up to VDDon. At this point the power MOSFET starts switching, the

generator is turned off, and the IC is powered by the energy stored in C3.

If both the jumpers J and J1 are left open, the VIPer16LN is self-supplied through the

internal high-voltage startup current generator, which is turned on as the VDD voltage falls

down to VDDcs_on and is switched off as it reaches VDDon.

If the jumper J is selected, the IC is supplied by the auxiliary winding, through D2 and R3. In

this case the VDD voltage increases with the load on the regulated output. In order to avoid

exceeding the VDD operating range, an external clamp (Dz, Rz) has been added.

If the jumper J2 is selected, the VIPer16LN is supplied from the output through D6. In

Figure 3 the VDD waveforms for both cases (self-supply and supply from the output) are

shown. It is worth noting that in the latter case the self-supply is excluded by keeping the

VDD voltage always above the VDDcs_on value. This is achievable only if the output voltage is

high enough, thus the minimum value which allows this setting to be used is VOUT ≥

VDDcs_on + Vy6 ≈ 12 V. If the value of VOUT is lower, the self-supply can be excluded only

through the auxiliary winding.

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OUT

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