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AN4007 Arkusz danych(PDF) 14 Page - STMicroelectronics |
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AN4007 Arkusz danych(HTML) 14 Page - STMicroelectronics |
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14 / 33 page ![]() Test board: design and evaluation AN4007 14/33 Doc ID 022455 Rev 2 The ripple at the switching frequency superimposed at the output voltage was also measured. The board is provided with an LC filter to further reduce the ripple without reducing the overall output capacitor’s ESR. The voltage ripple across the output connector (VOUT) and before the LC filter (VOUT_PRE) were measured in order to verify the effectiveness of the LC filter: Figure 13 shows the output voltage ripple at full load when the converter input voltage is 115 VAC; while Figure 14 shows the output voltage ripple at full load when the converter input voltage is 230 VAC. Figure 13. Output voltage ripple at full load and 230 VAC AM11352v1 Ch1 (Pk-Pk): 18.73 mV Ch2 (Pk-Pk): 298.3 mV M: 20.0 µs/div VOUT_PRE VOUT |
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