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ST7 AND ST9 PERFORMANCE BENCHMARKING

7.2.3 Special addressing modes and instructions

Test routines assembly code analysis has pointed out that some addressing modes and

instructions can reduce significantly the code size. To a minor extent, execution time may also

be decreased. The addressing modes and instructions concerned are usually those which

allow to make two operations within a single instruction.

Indirect with pre/post-increment addressing mode is an example. This mode is very useful for

loops and block moves. Modes allowing memory-to-memory transfers are another example

for block moves. In the same way, instructions such as bit test & set, decrement & branch, or

compare & branch have stood out for the same reasons.

These addressing modes and instructions are mentioned in tables as special addressing

modes and special instructions.

7.3 MCU CORE ANALYSIS

The following paragraphs are synthetical diagrams presenting the main parameters of core

architecture for each MCU. Those parameters have been synthesized from the databooks.

Some special characteristics are also mentioned, even if they are not really significant for the

benchmark result analysis.

AN910 Arkusz danych(PDF) 27 Page - STMicroelectronics