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INTERRUPT HANDLING FOR STR7 MICROCONTROLLERS

the IRQ interrupt vector is executed and branches to the IRQhandler subroutine. During this

time, IRQs are not allowed.

The IRQ handler starts by adjusting the lr_irq, then saves registers from 0 to 12, the spsr_irq

and the lr_irq register to the IRQ stack, before executing the instruction located in the IVR, a

return address is saved to the lr_irq. The IVR content is executed by pointing the PC to IVR

register address.

where the mode is switched back into system mode to allow other IRQ interrupts once again.

which can now be branched to. Now the core is in SYS mode so that the registers in IRQ mode

are preserved.

Once this has finished, the processor returns and the core is switched back to IRQ mode,

which once again disables other IRQs. Then the processor returns to the IRQHandler routine,

the pending bit is cleared in the EIC_IPR register, the saved registers are restored, the pro-

gram counter is restored from the link register and finally the cpsr is restored from the spsr of

the IRQ mode.

Normal operation can then resume back in the user program with SYS/USR mode restored.