| Zakładka z wyszukiwarką danych komponentów |
|
AN1776 Arkusz danych(PDF) 4 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN1776 Arkusz danych(HTML) 4 Page - STMicroelectronics |
|
4 / 13 page ![]() 4/13 INTERRUPT HANDLING FOR STR7 MICROCONTROLLERS Note that the exception handler itself can be written in either ARM or Thumb instruction code. Any exception handler code written with the Thumb instruction set will return the processor to ARM state as the program counter will have to back to the original application code (i.e. main loop) with ARM instructions. 5 INTERRUPT HANDLING This section of the application note gives an introduction to interrupt handling from the periph- erals. In particular, the IRQ and FIQ interrupt modes are discussed. Many of the peripherals can be configured to generate interrupts in certain circumstances, for example a Timer might be set up to trigger an interrupt after a certain amount of time, periodically. How this Timer in- terrupt is handled by the exception handler is to be decided by the user-defined section of the handler of the code. The ARM core has two levels of external interrupt handling, IRQ and FIQ, however the STR7 microcontrollers have a large number of interrupt sources. To manage all of the peripheral in- terrupts together with their priorities, the STR7 family of microcontrollers includes an En- hanced Interrupt Controller. The EIC has hardware handling of multiple interrupt channels, in- terrupt priority and automatic vectorization. 5.1 FIQ INTERRUPTS VERSUS IRQ INTERRUPTS FIQ interrupts have a higher priority than IRQs which means that they will be serviced first when situations arise with both IRQ and FIQ events simultaneously. Servicing an FIQ will dis- able an IRQ and therefore IRQs will not be serviced until the FIQ handler completely exits. FIQ interrupts are designed to be run as quickly as possible. The handler for FIQ can be placed directly at the end of the exception vectors table since the vector is the last in the table. A jump to another address therefore is not necessary and can be run immediately. In addition, FIQ mode has an additional 5 banked registers which means that there is less time wasted saving the non-banked registers before serving the FIQ exception handling and restoring them before exiting the exception. 5.2 SIMPLE INTERRUPT HANDLED IN C The following example shows a simple interrupt handler written in C. In addition, the related assembly code is shown, compiled with and without __irq. Note that the assembly code differs between one compiler to another. __irq void IRQHandler (void) { u16 *IRQChannel = (u32 *)0xFFFFF804 if (* IRQChannel == 0) // which interrupt was it Channel0_IRQHandler(); // process the interrupt // insert checks for other interrupt sources here |
|
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |