IRF9392PBF_15 datasheet(5/8 Pages) IRF

5 / 8 page

IRF9392PbF

www.irf.com

Fig 14. Maximum Avalanche Energy vs. Drain Current

Fig 12. On-Resistance vs. Gate Voltage

Fig 13. Typical On-Resistance vs. Drain Current

Fig 15

. Typical Power vs. Time

* Reverse Polarity of D.U.T for P-Channel

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple

≤ 5%

Body Diode

Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D =

P.W.

Period

* VGS = 5V for Logic Level Devices

Inductor Current

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

• di/dt controlled by RG

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

VDD

D.U.T

Fig 16.

Diode Reverse Recovery Test Circuit for P-Channel HEXFET® Power MOSFETs

-VGS, Gate -to -Source Voltage (V)

ID = -9.8A

TJ = 25°C

TJ = 125°C

-ID, Drain Current (A)

Vgs = -4.5V

Vgs = -10V

100

125

150

Starting TJ , Junction Temperature (°C)

100

200

300

400

500

TOP

-2.0A

-2.8A

BOTTOM -7.8A

1E-5

1E-4

1E-3

1E-2

1E-1

1E+0

Time (sec)

200

400

600

800

1000

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