Data Sheet

ADL5246

Rev. A | Page 9 of 36

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NOTES

1. NIC = NO INTERNAL CONNECTION.

2. THE EXPOSED PADDLE (EP) MUST BE SOLDERED

TO A LOW IMPEDANCE GROUND PLANE.

24 GND

23 GND

22 NIC

21 RFIN3

20 GND

19 NIC

18 RFOUT2

17 NIC

1

2

3

4

5

6

7

8

GND

RFIN1

GND

NIC

NIC

VSW1

NIC

NIC

ADL5246

TOP VIEW

EXPOSED PAD

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 3, 10, 20, 23, 24,

25, 27, 29, 31, EP

GND

Ground. The exposed paddle (EP) and ground pins must be soldered to a low impedance ground plane.

2

RFIN1

RF Input. This pin requires a dc blocking capacitor. Use a 100 pF capacitor for normal operation.

4, 5, 7, 8, 9, 12,

14, 17, 19, 22

NIC

No Internal Connection. These pins are not connected to internal circuitry. The user may optionally solder

to a low impedance ground plane for grounding, shielding, and printed circuit board (PCB) trace

impedance continuity.

6

VSW1

Bypass Switch Control. Logic low = 0 V, and logic high = 3.3 V. Switch logic is shown in Table 5.

11

VPOS1

Bias for the AMP2 LNA. Connect this pin to the dc supply voltage through an RF choke.

13

VSW1

Bypass Switch Control. Logic low = 0 V, and logic high = 3.3 V. Switch logic is shown in Table 5.

15

VGAIN1

Gain Control for VVA1. The gain control range is 0 V to 3.3 V.

16

VGAIN2

Gain Control VVA2. The gain control range is 0 V to 3.3 V.

18

RFOUT2

RF Output of the Voltage Variable Attenuator (VVA) Block.

21

RFIN3

Driver Amplifier Input. This pin requires a dc blocking capacitor. Use a 100 pF capacitor for normal operation.

26

RFOUT3

Driver Amplifier Output. Connect this pin to a dc supply through an RF choke.

28

VPOS2

Bias for VVA1, VVA2, and the AMP3 Bias Circuit. Connect this pin to the dc supply voltage through an RF choke.

30

RFIN2

RF Input to the VGA Block.

32

RFOUT1

Low Noise Amplifier Output. Connect this pin to a dc supply through an RF choke.