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LSM6DSM Arkusz danych(PDF) 68 Page - STMicroelectronics |
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LSM6DSM Arkusz danych(HTML) 68 Page - STMicroelectronics |
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68 / 113 page ![]() Register description LSM6DSM 68/113 DocID028165 Rev 2 10.22 CTRL10_C (19h) Control register 10 (r/w). 10.23 MASTER_CONFIG (1Ah) Master configuration register (r/w). Table 74. CTRL10_C register 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. 0(1) TIMER_ EN PEDO_ EN TILT_ EN FUNC_EN PEDO_RST _STEP SIGN_ MOTION_EN Table 75. CTRL10_C register description TIMER_EN Enable timestamp count. The count is saved in TIMESTAMP0_REG (40h), TIMESTAMP1_REG (41h) and TIMESTAMP2_REG (42h). Default: 0 (0: timestamp count disabled; 1: timestamp count enabled) PEDO_EN Enable pedometer algorithm(1). Default value: 0 (0: pedometer algorithm disabled; 1: pedometer algorithm enabled) 1. This is effective if FUNC_EN bit set to '1'. TILT_EN Enable tilt calculation(1). FUNC_EN Enable embedded functionalities (pedometer, tilt, significant motion, sensor hub and ironing). Default value: 0 (0: disable functionalities of embedded functions and accelerometer filters; 1: enable functionalities of embedded functions and accelerometer filters) PEDO_RST_ STEP Reset pedometer step counter. Default value: 0 (0: disabled; 1: enabled) SIGN_MOTION_EN Enable significant motion function(1). Default value: 0 (0: disabled; 1: enabled) Table 76. MASTER_CONFIG register DRDY_ON _INT1 DATA_VALID _SEL_FIFO 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. START_ CONFIG PULL_UP _EN PASS_ THROUGH _MODE IRON_EN MASTER_ ON Table 77. MASTER_CONFIG register description DRDY_ON_ INT1 Manage the Master DRDY signal on INT1 pad. Default: 0 (0: disable Master DRDY on INT1; 1: enable Master DRDY on INT1) DATA_VALID_ SEL_FIFO Selection of FIFO data-valid signal. Default value: 0 (0: data-valid signal used to write data in FIFO is the XL/Gyro data-ready or step detection(1); 1: data-valid signal used to write data in FIFO is the sensor hub data-ready) |
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