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AD6676EBZ Arkusz danych(PDF) 78 Page - Analog Devices

Numer części AD6676EBZ
Szczegółowy opis  Wideband IF Receiver Subsystem
PDF  90 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD6676EBZ Arkusz danych(HTML) 78 Page - Analog Devices

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AD6676
Data Sheet
Rev. A | Page 78 of 90
AGC Flag 1 Select Register
Address: 0x19C, Reset: 0x00, Name: FLAG1_SEL
Table 84. Bit Descriptions for FLAG1_SEL
Bits
Bit Name
Description
Reset
Access
[7:3]
RESERVED
0x00
RW
[2:0]
FLAG1_SEL
Select one of four flags to output on the AGC4 pin.
0x0
RW
000 = ADC reset pulse.
100 = DEC peak above DEC Threshold 0.
101 = DEC peak above DEC Threshold 1.
110 = DEC peak below DEC low threshold for dwell time.
AGC Flag Enable Register
Address: 0x19E, Reset: 0x00, Name: EN_FLAG
Table 85. Bit Descriptions for EN_FLAG
Bits
Bit Name
Description
Reset
Access
[7:5]
RESERVED
0x0
RW
4
EN_OR
Combine ADC reset with peak detect. When asserted, this bit causes
the ADC reset pulse (Flag Select Option 0) to be logically OR-ed with
one of the peak-detect flags options specified in Register 0x19B or
Register 0x19C.
0x0
RW
[3:2]
RESERVED
0x0
RW
1
EN_FLAG1
Enable Flag 1.
0x0
RW
0 = Force AGC4 pin low.
1 = Enable selected flag on AGC4 pin (see FLAG1_SEL).
0
EN_FLAG0
Enable Flag 0.
0x0
RW
0 = Force AGC3 pin low.
1 = Enable selected flag on AGC3 pin (see FLAG0_SEL).
Force GPIO Register
Address: 0x1B0, Reset: 0x00, Name: FORCE_GPIO
Table 86. Bit Descriptions for FORCE_GPIO
Bits
Bit Name
Description
Reset
Access
[7:4]
RESERVED
0x0
RW
[3:0]
FORCE_GPIO
Force GPIO use. Force one or more of the pins, AGC1 to AGC4, to be used as a GPIO rather than
any other specified use.
0x00
RW
Bit 0: force AGC1 to be used as a GPIO.
Bit 1: force AGC2 to be used as a GPIO.
Bit 2: force AGC3 to be used as a GPIO.
Bit 3: force AGC4 to be used as a GPIO.



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