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CLC5506PCASM Arkusz danych(PDF) 9 Page - National Semiconductor (TI) |
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CLC5506PCASM Arkusz danych(HTML) 9 Page - National Semiconductor (TI) |
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9 / 12 page ![]() APPLICATION NOTE (Continued) MICROWIRE™ Interface Data In along with the Clock, LE, and Data Out, is used for the following purposes: Setting the 6-bit gain control code Putting the device into a Power Up/Down mode to mini- mize power consumption Daisy chain several CLC5506 or other MICROWIRE In- terface devices through the Data Out pin The MICROWIRE interface timing diagram along with the bit assignment of all 8 bits is shown in Figure 2. The interface is active only when LE (pin 5) is low; otherwise, the interface is inactive (Clock and Data In are ignored) and the CLC5506 gain is the current content of the 6 bits already read into the device. With LE low, each successive positive transition of Clock will read the value of the Data In into a series of 8 single bit shift registers. In order to load all 8 registers, 8 Clock transitions are required after which, when LE is allowed to go High, the new values in the shift registers are latched to determine the device gain setting (or Power Down state). New data can be shifted into the device with the present gain setting not af- fected as long as LE is held low. Data from the last register in the chain is clocked out on Data Out pin on the negative transitions of Clock as shown in Fig- ure 3. This enables several MICROWIRE Interface devices to be daisy chained and controlled from a single bus master. The maximum clock frequency (Clock pin) is 1MHz. DS101050-18 Note: 1. Data is clocked in on the rising edge of Clock. 2. Power Down bit is the first data to enter the CLC5506. FIGURE 2. MICROWIRE Interface Timing Diagram DS101050-19 FIGURE 3. MICROWIRE Interface Serial Data Out Timing www.national.com 9 |
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