LMP8602MASLASHNOPB datasheet(25/42 Pages) TI1

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Output Buffer

ADC

TIME (ns)

0.5

0.4

0.3

0.2

0.1

-0.1

-0.2

-0.3

-0.4

-0.5

100

150

200

250

300

20 pF

10 pF

VS = 3.3V

TIME (ns)

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

100

150

200

250

300

20 pF

10 pF

VS = 5V

LMP8601/

LMP8601Q

LMP8601, LMP8601-Q1

LMP8602, LMP8602-Q1

LMP8603, LMP8603-Q1

www.ti.com

SNOSAR2H – SEPTEMBER 2008 – REVISED APRIL 2016

Product Folder Links: LMP8601 LMP8601-Q1 LMP8602 LMP8602-Q1 LMP8603 LMP8603-Q1

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Device Functional Modes (continued)

7.4.2 Driving Switched Capacitive Loads

Some ADCs load their signal source with a sample and hold capacitor. The capacitor may be discharged prior to

being connected to the signal source. If the LMP860x and LMP860x-Q1 are driving such ADCs, the sudden

current that should be delivered when the sampling occurs may disturb the output signal. This effect was

simulated with the circuit shown in Figure 56 where the output is to a capacitor that is driven by a rail-to-rail

square wave.

Figure 56. Driving Switched Capacitive Load

This circuit simulates the switched connection of a discharged capacitor to the LMP860x and LMP860x-Q1

output. The resulting VOUT disturbance signals are shown in Figure 57 and Figure 58.

Figure 57. Capacitive Load Response at 3.3 V

Figure 58. Capacitive Load Response at 5.0 V

These figures can be used to estimate the disturbance that will be caused when driving a switched capacitive

load. To minimize the error signal introduced by the sampling that occurs on the ADC input, place an additional

RC filter between the LMP860x or LMP860x-Q1 and the ADC, as illustrated in Figure 59.

Figure 59. Reduce Error When Driving ADCs

The external capacitor absorbs the charge that flows when the ADC sampling capacitor is connected. The

external capacitor should be much larger than the sample-and-hold capacitor at the input of the ADC, and the

RC time constant of the external filter should be such that the speed of the system is not affected.

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